Front-end wafer-level microsystem packaging technique with microcap array

2002 ◽  
Author(s):  
Yuh-Min Chiang ◽  
Mark Bachman ◽  
Guann-pyng Li
Keyword(s):  
Wafer Level ◽  
Front End ◽  
Microsystem Packaging ◽  
Packaging Technique

Characterization of Circuit Blocks for Configurable Analog-Front-End

2014 ◽  
Vol 2014 (HITEC) ◽  
pp. 000146-000153 ◽  
Author(s):  
Bruce W. Ohme ◽  
Mark R. Larson ◽  
Bhal Tulpule ◽  
Alireza Behbahani
Keyword(s):  
Embedded Systems ◽  
Integrated Circuit ◽  
Extreme Temperature ◽  
Silicon On Insulator ◽  
Instrumentation Amplifier ◽  
Signal Conditioning ◽  
Wafer Level ◽  
Voltage Range ◽  
Front End ◽  
Programmable Gain

Analog functions have been implemented in a Silicon-on-Insulator (SOI) process optimized for high-temperature (>225°C) operation. These include a linear regulator/reference block that supports input voltages up to 50V and provides multiple independent voltage outputs. Additional blocks provide configurable sensor excitation levels of up to 10V DC and/or 20V AC-differential, with current limiting and monitoring. A dual-channel Programmable-Gain-Instrumentation Amplifier (PGIA) and a high-level AC input block with programmable gain and offset serve signal conditioning, gain, and scaling needs. A multiplexer and analog buffer provide an output that is scaled and centered for down-stream A-to-D conversion. Limited component availability and high component counts deter development of sensing and control electronics for extreme temperature (>200°) applications. Systems require front-end power conditioning, sensor excitation and monitoring, response amplification, scaling, and multiplexing. Back-end Analog-to-Digital conversion and digital processing/control can be implemented using one or two integrated circuit chips, whereas the front-end functions require component counts in the dozens. The low level of integration in the available portfolio of SOI devices results in high component count when constructing signal conditioning interfaces for aerospace sensors. These include quasi-DC sensors such as thermo-couples, strain-gauges, bridge transducers as well as AC-coupled sensors and position transducers, such as Linear Variable Differential Transducers (LVDT's). Furthermore, a majority of sensor applications are best served by excitation/response voltage ranges that typically exceed the voltage range of digital electronics (either 5V or 3.3V in currently available digital IC's for use above 200°C). These constraints led Embedded Systems LLC to design a generic device which was implemented by Honeywell as an analog ASIC (Application Specific Integrated Circuit). This paper will describe the ASIC block-level capabilities in the context of the typical applications and present characterization data from wafer-level testing at the target temperature range (225C). This material is based upon work performed by Honeywell International under a subcontract from Embedded Systems LLC, funding for which was provided by the U.S. Air Force Small Business Innovative Research program.

FBAR Rx filters for handset front-end modules with wafer-level packaging

2004 ◽  
Author(s):  
Kun Wang ◽  
M. Frank ◽  
P. Bradley ◽  
R. Ruby ◽  
W. Mueller ◽  
...  
Keyword(s):  
Wafer Level ◽  
Wafer Level Packaging ◽  
Front End

A Compact 28 GHz RF Front-end Module using IPDs and Wafer-level Metal Fan-out Packaging

2019 ◽  
Author(s):  
Jong-Min Yook ◽  
Dongsu Kim ◽  
Bok-Ju Park ◽  
Sanghoon Sim ◽  
Yun-Seong Eo ◽  
...  
Keyword(s):  
Wafer Level ◽  
Front End ◽  
Rf Front End ◽  
Front End Module

scholarly journals A Novel High-Q Dual-Mass MEMS Tuning Fork Gyroscope Based on 3D Wafer-Level Packaging

Sensors ◽  
2021 ◽  
Vol 21 (19) ◽  
pp. 6428
Author(s):  
Pengfei Xu ◽  
Chaowei Si ◽  
Yurong He ◽  
Zhenyu Wei ◽  
Lu Jia ◽  
...  
Keyword(s):  
Tuning Fork ◽  
High Reliability ◽  
Three Dimensional ◽  
Low Frequency ◽  
Wafer Level ◽  
Loop Control ◽  
High Q ◽  
3D Packaging ◽  
Q Factors ◽  
Packaging Technique

Tuning fork gyroscopes (TFGs) are promising for potential high-precision applications. This work proposes and experimentally demonstrates a novel high-Q dual-mass tuning fork microelectromechanical system (MEMS) gyroscope utilizing three-dimensional (3D) packaging techniques. Except for two symmetrically decoupled proof masses (PM) with synchronization structures, a symmetrically decoupled lever structure is designed to force the antiparallel, antiphase drive mode motion and eliminate low frequency spurious modes. Thermoelastic damping (TED) and anchor loss are greatly reduced by the linearly coupled, momentum- and torque-balanced antiphase sense mode. Moreover, a novel 3D packaging technique is used to realize high Q-factors. A composite substrate encapsulation cap, fabricated by through-silicon-via (TSV) and glass-in-silicon (GIS) reflow processes, is anodically bonded to the wafer-scale sensing structures. A self-developed control circuit is adopted to realize loop control and characterize gyroscope performances. It is shown that a high-reliability electrical connection, together with a high air impermeability package, can be fulfilled with this 3D packaging technique. Furthermore, the Q-factors of the drive and sense modes reach up to 51,947 and 49,249, respectively. This TFG realizes a wide measurement range of ±1800 °/s and a high resolution of 0.1°/s with a scale factor nonlinearity of 720 ppm after automatic mode matching. In addition, long-term zero-rate output (ZRO) drift can be effectively suppressed by temperature compensation, inducing a small angle random walk (ARW) of 0.923°/√h and a low bias instability (BI) of 9.270°/h.

A Wafer-Level Microcap Array to Enable High-Yield Microsystem Packaging

2004 ◽  
Vol 27 (3) ◽  
pp. 490-496 ◽  
Author(s):  
Y.-M.J. Chiang ◽  
M. Bachman ◽  
G.P. Li
Keyword(s):  
High Yield ◽  
Wafer Level ◽  
Microsystem Packaging

A Robust Thin-Film Wafer-Level Packaging Approach for MEMS Devices

2010 ◽  
Vol 7 (3) ◽  
pp. 175-180 ◽  
Author(s):  
Krishnan Seetharaman ◽  
Bart van Velzen ◽  
Johannes van Wingerden ◽  
Hans van Zadelhoff ◽  
Cadmus Yuan ◽  
...  
Keyword(s):  
Thin Film ◽  
Silicon Nitride ◽  
Wafer Bonding ◽  
Sacrificial Layer ◽  
Early Stage ◽  
Bulk Acoustic Wave ◽  
Mems Devices ◽  
Wafer Level ◽  
Front End ◽  
Mems Device

Micro-electromechanical systems (MEMS) devices are extremely sensitive to their environment, especially at the wafer level, until they are packaged in final form. The harsh back-end (BE) operations that the MEMS devices have to endure include dicing, pick-and-place, wire bonding, and molding. During these processing steps, the MEMS device is exposed to particles and contaminants. Therefore, protection at an early stage is a fundamental requirement. We describe a silicon nitride thin-film capping, which is processed using a sacrificial layer technique only with front-end technology. This approach is suitable for mass production of MEMS devices, owing to the fact that it is more cost-effective when compared to other approaches such as wafer-to-wafer bonding and die-to-wafer bonding. A bulk acoustic wave (BAW) resonator that finds application in the radio frequency (RF) front end, for example, in cell phones, is taken as a MEMS vehicle for our work. It is an example of an extremely sensitive MEMS device, because the resonance frequency shifts significantly when additional mass is accidentally deposited on its surface. The thickness of the silicon nitride capping that is required to withstand all the BE steps, in particular transfer molding, is estimated using simple analytical calculations and finite element model (FEM) simulations. The pressure acting on the thin film capping and the thermal load during molding are included in the FEM model. Using this, the minimum thickness required for the capping is determined. We prove that a BAW resonator capped with silicon nitride at the wafer level can be wafer-thinned, diced, wire bonded, and molded without major degradation in performance.

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