Multiply interconnected GaAs/AlGaAs quantum-well p-i-n-i-p-type diodes for high-performance all-optical bistable and oscillation device applications

2000 ◽  
Author(s):  
El-Hang Lee
1995 ◽  
Vol 395 ◽  
Author(s):  
Takashi Matsuoka

ABSTRACTThe development and device applications of the InGaAIN system have progressed dramatically with improvements in crystalline quality by achieved through a buffer layer, the realization of p-type doping, and the growth of ternary alloys. As a substrate, sapphire is mainly used for epitaxial growth because of the lack of a GaN bulk crystal. However, many cracks in GaN film can still be observed and its X-ray rocking curve width is less than 100 arc seconds. This is are thought to be due to the lattice constants and thermal expansion coefficients of GaN and sapphire differ by 13.8% and by -34.2%, respectively. These values are extremely large in comparison with the corresponding values for InP and GaAs. Lattice-matching growth thus remains a basic problem in growing the high-quality epitaxial films necessary for high-performance devices.This paper reviews attempts at lattice-matching growth. Lattice-matching growth of InGaN on a house-made ZnO substrate and near-lattice-matching growth of GaN on SiC and NdGaO3 substrates have been proposed and performed, and the effects of lattice-matching have been confirmed. Various types of surface planes commercially available sapphire substrates are also discussed.


1992 ◽  
Vol 2 (9) ◽  
pp. 1727-1738 ◽  
Author(s):  
A. Accard ◽  
F. Brillouet ◽  
E. Duda ◽  
B. Fernier ◽  
G. Gelly ◽  
...  

1998 ◽  
Vol 34 (19) ◽  
pp. 1888 ◽  
Author(s):  
G. Höck ◽  
T. Hackbarth ◽  
U. Erben ◽  
E. Kohn ◽  
U. König
Keyword(s):  

2019 ◽  
Vol 288 ◽  
pp. 104-112 ◽  
Author(s):  
Yanghai Gui ◽  
Lele Yang ◽  
Kuan Tian ◽  
Hongzhong Zhang ◽  
Shaoming Fang

2021 ◽  
Vol 13 (1) ◽  
Author(s):  
Muhammad Naqi ◽  
Kyung Hwan Choi ◽  
Hocheon Yoo ◽  
Sudong Chae ◽  
Bum Jun Kim ◽  
...  

AbstractLow-temperature-processed semiconductors are an emerging need for next-generation scalable electronics, and these semiconductors need to feature large-area fabrication, solution processability, high electrical performance, and wide spectral optical absorption properties. Although various strategies of low-temperature-processed n-type semiconductors have been achieved, the development of high-performance p-type semiconductors at low temperature is still limited. Here, we report a unique low-temperature-processed method to synthesize tellurium nanowire networks (Te-nanonets) over a scalable area for the fabrication of high-performance large-area p-type field-effect transistors (FETs) with uniform and stable electrical and optical properties. Maximum mobility of 4.7 cm2/Vs, an on/off current ratio of 1 × 104, and a maximum transconductance of 2.18 µS are achieved. To further demonstrate the applicability of the proposed semiconductor, the electrical performance of a Te-nanonet-based transistor array of 42 devices is also measured, revealing stable and uniform results. Finally, to broaden the applicability of p-type Te-nanonet-based FETs, optical measurements are demonstrated over a wide spectral range, revealing an exceptionally uniform optical performance.


2007 ◽  
Vol 556-557 ◽  
pp. 153-156
Author(s):  
Chi Kwon Park ◽  
Gi Sub Lee ◽  
Ju Young Lee ◽  
Myung Ok Kyun ◽  
Won Jae Lee ◽  
...  

A sublimation epitaxial method, referred to as the Closed Space Technique (CST) was adopted to produce thick SiC epitaxial layers for power device applications. In this study, we aimed to systematically investigate surface morphologies and electrical properties of SiC epitaxial layers grown with varying a SiC/Al ratio in a SiC source powder during the sublimation growth using the CST method. It was confirmed that the acceptor concentration of epitaxial layer was continuously decreased with increasing the SiC/Al ratio. The blue light emission was successfully observed on a PN diode structure fabricated with the p-type SiC epitaxial layer. Furthermore, 4H-SiC MESFETs having a micron-gate length were fabricated using a lithography process and their current-voltage performances were characterized.


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