Loss measurements for β-SiC-on-insulator waveguides for high-speed silicon-based photonic devices

Author(s):  
Adrian P. Vonsovici ◽  
Graham T. Reed ◽  
Alan G. R. Evans ◽  
Fereydoon Namavar
Photonics ◽  
2019 ◽  
Vol 6 (1) ◽  
pp. 13 ◽  
Author(s):  
Reza Maram ◽  
Saket Kaushal ◽  
José Azaña ◽  
Lawrence Chen

Multitude applications of photonic devices and technologies for the generation and manipulation of arbitrary and random microwave waveforms, at unprecedented processing speeds, have been proposed in the literature over the past three decades. This class of photonic applications for microwave engineering is known as microwave photonics (MWP). The vast capabilities of MWP have allowed the realization of key functionalities which are either highly complex or simply not possible in the microwave domain alone. Recently, this growing field has adopted the integrated photonics technologies to develop microwave photonic systems with enhanced robustness as well as with a significant reduction of size, cost, weight, and power consumption. In particular, silicon photonics technology is of great interest for this aim as it offers outstanding possibilities for integration of highly-complex active and passive photonic devices, permitting monolithic integration of MWP with high-speed silicon electronics. In this article, we present a review of recent work on MWP functions developed on the silicon platform. We particularly focus on newly reported designs for signal modulation, arbitrary waveform generation, filtering, true-time delay, phase shifting, beam steering, and frequency measurement.


2021 ◽  
Vol 11 (4) ◽  
pp. 1887
Author(s):  
Markus Scherrer ◽  
Noelia Vico Triviño ◽  
Svenja Mauthe ◽  
Preksha Tiwari ◽  
Heinz Schmid ◽  
...  

It is a long-standing goal to leverage silicon photonics through the combination of a low-cost advanced silicon platform with III-V-based active gain material. The monolithic integration of the III-V material is ultimately desirable for scalable integrated circuits but inherently challenging due to the large lattice and thermal mismatch with Si. Here, we briefly review different approaches to monolithic III-V integration while focusing on discussing the results achieved using an integration technique called template-assisted selective epitaxy (TASE), which provides some unique opportunities compared to existing state-of-the-art approaches. This method relies on the selective replacement of a prepatterned silicon structure with III-V material and thereby achieves the self-aligned in-plane monolithic integration of III-Vs on silicon. In our group, we have realized several embodiments of TASE for different applications; here, we will focus specifically on in-plane integrated photonic structures due to the ease with which these can be coupled to SOI waveguides and the inherent in-plane doping orientation, which is beneficial to waveguide-coupled architectures. In particular, we will discuss light emitters based on hybrid III-V/Si photonic crystal structures and high-speed InGaAs detectors, both covering the entire telecom wavelength spectral range. This opens a new path towards the realization of fully integrated, densely packed, and scalable photonic integrated circuits.


2008 ◽  
Author(s):  
Haisheng Rong ◽  
Simon Ayotte ◽  
Shengbo Xu ◽  
Oded Cohen ◽  
Mario Paniccia

Nanophotonics ◽  
2014 ◽  
Vol 3 (4-5) ◽  
pp. 329-341 ◽  
Author(s):  
Raji Shankar ◽  
Marko Lončar

AbstractThe mid-infrared (IR) wavelength region (2–20 µm) is of great interest for a number of applications, including trace gas sensing, thermal imaging, and free-space communications. Recently, there has been significant progress in developing a mid-IR photonics platform in Si, which is highly transparent in the mid-IR, due to the ease of fabrication and CMOS compatibility provided by the Si platform. Here, we discuss our group’s recent contributions to the field of silicon-based mid-IR photonics, including photonic crystal cavities in a Si membrane platform and grating-coupled high-quality factor ring resonators in a silicon-on-sapphire (SOS) platform. Since experimental characterization of microphotonic devices is especially challenging at the mid-IR, we also review our mid-IR characterization techniques in some detail. Additionally, pre- and post-processing techniques for improving device performance, such as resist reflow, Piranha clean/HF dip cycling, and annealing are discussed.


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