Analysis of row to row routing in double height standard-cells

Design-Process-Technology Co-optimization XV ◽

10.1117/12.2587213 ◽

2021 ◽

Author(s):

Maarten Berkens ◽

Simon J. Klaver

Keyword(s):

Standard Cells

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HYSTERESIS IN STANDARD CELLS

Journal of the American Chemical Society ◽

10.1021/ja01383a006 ◽

1929 ◽

Vol 51 (8) ◽

pp. 2345-2351

Author(s):

Wendell S. Niederhauser ◽

George A. Hulett

Keyword(s):

Standard Cells

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Standard cells for auto scaling pulsed analog neural circuits

Proceedings of IEEE Pacific Rim Conference on Communications Computers and Signal Processing ◽

10.1109/pacrim.1993.407167 ◽

2002 ◽

Author(s):

M.P. Bruce-Lockhart ◽

D. Bhattacharya

Keyword(s):

Neural Circuits ◽

Standard Cells ◽

Auto Scaling

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CONDITIONS AFFECTING THE REPRODUCIBILITY AND CONSTANCY OF WESTON STANDARD CELLS

Journal of the American Chemical Society ◽

10.1021/ja01682a008 ◽

1925 ◽

Vol 47 (5) ◽

pp. 1255-1267 ◽

Cited By ~ 4

Author(s):

Warren C. Vosburgh

Keyword(s):

Standard Cells

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A delay-line based DCO for multimedia applications using digital standard cells only

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. ◽

10.1109/isscc.2003.1234371 ◽

2003 ◽

Cited By ~ 9

Author(s):

E. Roth ◽

M. Thalmann ◽

N. Felber ◽

W. Fichtner

Keyword(s):

Delay Line ◽

Multimedia Applications ◽

Standard Cells

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A 65nm Reliable Near-Subthreshold Standard Cells Design Using Schmitt Trigger

10.1109/asicon52560.2021.9620399 ◽

2021 ◽

Author(s):

Jinliang Han ◽

Yongzhong Wen ◽

Yuejun Zhang ◽

Pengjun Wang ◽

Huihong Zhang

Keyword(s):

Schmitt Trigger ◽

Standard Cells

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Estimation of Circuit Physical Features in High-Level Synthesis Based on Standard Cells

Advanced Techniques for Embedded Systems Design and Test ◽

10.1007/978-1-4757-4419-4_8 ◽

1998 ◽

pp. 179-199

Author(s):

Milagros Fernández ◽

Hortensia Mecha

Keyword(s):

High Level Synthesis ◽

Standard Cells ◽

High Level ◽

Physical Features

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Designs and Implementations of Low-Leakage Digital Standard Cells Based on Gate-Length Biasing

Research Journal of Applied Sciences Engineering and Technology ◽

10.19026/rjaset.5.4606 ◽

2013 ◽

Vol 5 (10) ◽

pp. 2957-2963 ◽

Cited By ~ 3

Author(s):

Jindan Chen ◽

Jianping Hu

Keyword(s):

Gate Length ◽

Standard Cells ◽

Low Leakage

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Electrolytic Mercurous Sulphate as Depolarizer for Standard Cells

Physical Review ◽

10.1103/physrevseriesi.22.47 ◽

1906 ◽

Vol 22 (1) ◽

pp. 47-51

Author(s):

George A. Hulett

Keyword(s):

Standard Cells

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Mitigating single-event multiple transients in a combinational circuit based on standard cells

Microelectronics Reliability ◽

10.1016/j.microrel.2020.113649 ◽

2020 ◽

Vol 109 ◽

pp. 113649

Author(s):

Wen Zhao ◽

Wei Chen ◽

Chaohui He ◽

Rongmei Chen ◽

Peitian Cong ◽

...

Keyword(s):

Single Event ◽

Combinational Circuit ◽

Standard Cells

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Logic Circuits and Standard Cells

Low-Power CMOS Circuits ◽

10.1201/9781420036503.ch7 ◽

2005 ◽

pp. 1-18

Author(s):

Christian Piguet

Keyword(s):

Logic Circuits ◽

Standard Cells

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