scholarly journals Interferometric in-situ III/V semiconductor dry-etch depth-control with ±0.8 nm best accuracy using a quadruple-Vernier-scale measurement

2021 ◽  
Vol 39 (5) ◽  
pp. 052204
Author(s):  
Guilherme Sombrio ◽  
Emerson Oliveira ◽  
Johannes Strassner ◽  
Christoph Doering ◽  
Henning Fouckhardt
Keyword(s):  
Etch Depth ◽  
Depth Control ◽  
Dry Etch

scholarly journals Precise in situ etch depth control of multilayered III−V semiconductor samples with reflectance anisotropy spectroscopy (RAS) equipment

2016 ◽  
Vol 7 ◽  
pp. 1783-1793 ◽  
Author(s):  
Ann-Kathrin Kleinschmidt ◽  
Lars Barzen ◽  
Johannes Strassner ◽  
Christoph Doering ◽  
Henning Fouckhardt ◽  
...  
Keyword(s):  
Secondary Ion Mass Spectrometry ◽  
Semiconductor Device ◽  
Device Fabrication ◽  
Etch Depth ◽  
Reflectance Anisotropy ◽  
Depth Control ◽  
Dry Etch ◽  
First Time ◽  
Secondary Ion

Reflectance anisotropy spectroscopy (RAS) equipment is applied to monitor dry-etch processes (here specifically reactive ion etching (RIE)) of monocrystalline multilayered III–V semiconductors in situ. The related accuracy of etch depth control is better than 16 nm. Comparison with results of secondary ion mass spectrometry (SIMS) reveals a deviation of only about 4 nm in optimal cases. To illustrate the applicability of the reported method in every day settings for the first time the highly etch depth sensitive lithographic process to form a film lens on the waveguide ridge of a broad area laser (BAL) is presented. This example elucidates the benefits of the method in semiconductor device fabrication and also suggests how to fulfill design requirements for the sample in order to make RAS control possible.

Atomic layer sensitive in-situ plasma etch depth control with reflectance anisotropy spectroscopy (RAS)

2017 ◽  
Author(s):  
Christoph Doering ◽  
Ann-Kathrin Kleinschmidt ◽  
Lars Barzen ◽  
Johannes Strassner ◽  
Henning Fouckhardt
Keyword(s):  
Atomic Layer ◽  
Etch Depth ◽  
Plasma Etch ◽  
Reflectance Anisotropy ◽  
Depth Control

scholarly journals Sidewall Slope Control of InP Via Holes for 3D Integration

Micromachines ◽  
2021 ◽  
Vol 12 (1) ◽  
pp. 89
Author(s):  
Jongwon Lee ◽  
Kilsun Roh ◽  
Sung-Kyu Lim ◽  
Youngsu Kim
Keyword(s):  
Inductively Coupled Plasma ◽  
Sio2 Layer ◽  
Etch Depth ◽  
Rf Power ◽  
3D Integration ◽  
Inductively Coupled ◽  
Wide Range ◽  
Via Holes ◽  
Dry Etch ◽  
Icp Etcher

This is the first demonstration of sidewall slope control of InP via holes with an etch depth of more than 10 μm for 3D integration. The process for the InP via holes utilizes a common SiO2 layer as an InP etch mask and conventional inductively coupled plasma (ICP) etcher operated at room temperature and simple gas mixtures of Cl2/Ar for InP dry etch. Sidewall slope of InP via holes is controlled within the range of 80 to 90 degrees by changing the ICP power in the ICP etcher and adopting a dry-etched SiO2 layer with a sidewall slope of 70 degrees. Furthermore, the sidewall slope control of the InP via holes in a wide range of 36 to 69 degrees is possible by changing the RF power in the etcher and introducing a wet-etched SiO2 layer with a small sidewall slope of 2 degrees; this wide slope control is due to the change of InP-to-SiO2 selectivity with RF power.

The Formation of an Epitaxial-Graphene Cap Layer for Post-Implantation High Temperature Annealing of SiC and its In Situ Removal by Si-Vapor Etching

2011 ◽  
Vol 679-680 ◽  
pp. 777-780 ◽  
Author(s):  
Shoji Ushio ◽  
Ayumu Adachi ◽  
Kazuhiro Matsuda ◽  
Noboru Ohtani ◽  
Tadaaki Kaneko
Keyword(s):  
High Temperature ◽  
Graphene Layer ◽  
Treatment Method ◽  
Etch Depth ◽  
High Temperature Annealing ◽  
Large Area ◽  
Vapor Flux ◽  
Precise Control ◽  
Post Implantation

As a new graphene functionality applicable to post-implantation high temperature annealing of SiC, a method of in situ formation and removal of large area epitaxial few-layer graphene on 4H-SiC(0001) Si-face is proposed. It is demonstrated that the homogeneous graphene layer formed by Si sublimation can be preserved without the decomposition of the underlying SiC substrate even in the excess of 2000 oC in ultrahigh vacuum. It is due to the existence of the stable (6√3×6√3) buffer layer at the interface. To ensure this cap function, the homogeneity of the interface must be guaranteed. In order to do that, precise control of the initial SiC surface flatness is required. Si-vapor etching is a simple and versatile SiC surface pre/post- treatment method, where thermally decomposed SiC surface is compensated by a Si-vapor flux from Si solid source in the same semi-closed TaC container. While this Si-vapor etching allows precise control of SiC etch depth and surface step-terrace structures, it also provides a “decap” function to remove of the graphene layer. The surface properties after the each process were characterized by AFM and Raman spectroscopy.

Defect Penetration During the Plasma Etching of Semiconductors

1992 ◽  
Vol 279 ◽  
Author(s):  
M. Rahman ◽  
M. A. Foad ◽  
S. Hicks ◽  
M. C. Holland ◽  
C. D. W. Wilkinson
Keyword(s):  
Plasma Etching ◽  
Surface Defect ◽  
Source Function ◽  
Complex Form ◽  
Simple Diffusion ◽  
Channeling Effect ◽  
Observed Damage ◽  
Dry Etch

ABSTRACTDry etching can introduce defects into the material being etched. Simple expressions for both sidewall and top surface defect distributions may be obtained by assuming that the defects are introduced according to a phenomenological source function. Calculations of conductance based on these expressions are found to describe very well measurements on dry-etched wires and epilayers. Mechanisms by which defects can penetrate into the sample are discussed. The role of sample heating and defect diffusion is examined. In-situ measurements of sample temperature during a dry-etch run indicate that simple diffusion is insufficient to account entirely for the observed damage. Instead, dry-etch damage may arise from other mechanisms such as by knock-on replacement collisions, or via a channeling effect. A more complex form of diffusion may also affect the final damage distribution.

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