High density plasma etching of titanium nitride metal gate electrodes for fully depleted silicon-on-insulator subthreshold transistor integration

2009 ◽  
Vol 27 (6) ◽  
pp. 2472 ◽  
Author(s):  
Steven A. Vitale ◽  
Jakub Kedzierski ◽  
Craig L. Keast
Keyword(s):  
Titanium Nitride ◽  
Plasma Etching ◽  
High Density ◽  
Silicon On Insulator ◽  
Metal Gate Electrodes ◽  
Metal Gate ◽  
Fully Depleted ◽  
Gate Electrodes ◽  
Density Plasma

Characterization of the CH4/H2/Ar high density plasma etching process for HgCdTe

1999 ◽  
Vol 28 (4) ◽  
pp. 347-354 ◽  
Author(s):  
C. R. Eddy ◽  
D. Leonhardt ◽  
V. A. Shamamian ◽  
J. R. Meyer ◽  
C. A. Hoffman ◽  
...  
Keyword(s):  
Plasma Etching ◽  
High Density ◽  
Etching Process ◽  
Plasma Etching Process ◽  
Density Plasma

scholarly journals Stability of Ru- and Ta-based metal gate electrodes in contact with dielectrics for Si-CMOS

2004 ◽  
Vol 241 (10) ◽  
pp. 2253-2267 ◽  
Author(s):  
Zhiqiang Chen ◽  
Veena Misra ◽  
Ryan P. Haggerty ◽  
Susanne Stemmer
Keyword(s):  
Metal Gate Electrodes ◽  
Metal Gate ◽  
Gate Electrodes

scholarly journals Etch Processing of III-V Nitrides

1999 ◽  
Vol 4 (S1) ◽  
pp. 902-913 ◽  
Author(s):  
Charles R. Eddy
Keyword(s):  
Plasma Etching ◽  
Microwave Power ◽  
Ohmic Contacts ◽  
High Density ◽  
Etching Process ◽  
Ion Energy ◽  
Plasma Etching Process ◽  
Device Processing ◽  
The Impact ◽  
Density Plasma

As III-V nitride devices advance in technological importance, a fundamental understanding of device processing techniques becomes essential. Recent works have exposed various aspects of etch processes. The most recent advances and the greatest remaining challenges in the etching of GaN, AlN, and InN are reviewed. A more detailed presentation is given with respect to GaN high density plasma etching. In particular, the results of parametric and fundamental studies of GaN etching in a high density plasma are described. The effect of ion energy and mass on surface electronic properties is reported. Experimental results identify preferential sputtering as the leading cause of observed surface non-stoichiometry. This mechanism provides excellent surfaces for ohmic contacts to n-type GaN, but presents a major obstacle for Schottky contacts or ohmic contacts to p-type GaN. Chlorine-based discharges minimize this stoichiometry problem by improving the rate of gallium removal from the surface. In an effort to better understand the high density plasma etching process for GaN, in-situ mass spectrometry is employed to study the chlorine-based high density plasma etching process. Gallium chloride mass peaks were monitored in a highly surface sensitive geometry as a function of microwave power (ion flux), total pressure (neutral flux), and ion energy. Microwave power and pressure dependencies clearly demonstrate the importance of reactive ions in the etching of wide band gap materials. The ion energy dependence demonstrates the importance of adequate ion energy to promote a reasonable etch rate (≥100-150 eV). The benefits of ion-assisted chemical etching are diminished for ion energies in excess of 350 V, placing an upper limit to the useful ion energy range for etching GaN. The impact of these results on device processing will be discussed and future needs identified.

Influence of Metal Gate Electrodes on Electrical Properties of Atomic-Layer-Deposited Al-Rich HfAlO/Ga2O3 MOSCAPs

2020 ◽  
Vol 67 (4) ◽  
pp. 1730-1736
Author(s):  
Hongpeng Zhang ◽  
Lei Yuan ◽  
Xiaoyan Tang ◽  
Jichao Hu ◽  
Jianwu Sun ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Atomic Layer ◽  
Metal Gate Electrodes ◽  
Metal Gate ◽  
Gate Electrodes

scholarly journals Design and Analysis of Nanoscaled Recessed-S/D SOI MOSFET-Based Pseudo-NMOS Inverter for Low-Power Electronics

2019 ◽  
Vol 2019 ◽  
pp. 1-12 ◽  
Author(s):  
Anjali Priya ◽  
Nilesh Anand Srivastava ◽  
Ram Awadh Mishra
Keyword(s):  
Threshold Voltage ◽  
Propagation Delay ◽  
Silicon On Insulator ◽  
Device Performance ◽  
Gate Length ◽  
Metal Gate ◽  
Short Channel ◽  
Fully Depleted ◽  
Soi Mosfet ◽  
Silvaco Atlas

In this paper, a comparative analysis of nanoscaled triple metal gate (TMG) recessed-source/drain (Re-S/D) fully depleted silicon-on-insulator (FD SOI) MOSFET has been presented for the design of the pseudo-NMOS inverter in the nanometer regime. For this, firstly, an analytical modeling of threshold voltage has been proposed in order to investigate the short channel immunity of the studied device and also verified against simulation results. In this structure, the novel concept of backchannel inversion has been utilized for the study of device performance. The threshold voltage has been analyzed by varying the parameters of the device like the ratio of metal gate length and the recessed-source/drain thickness for TMG Re-S/D SOI MOSFET. Drain-induced barrier lowering (DIBL) has also been explored in terms of recessed-source/drain thickness and the metal gate length ratio to examine short channel effects (SCEs). For the exact estimation of results, the comparison of the existing multimetal gate structures with TMG Re-S/D SOI MOSFET has also been taken under study in terms of electrostatic performance, i.e., threshold voltage, subthreshold slope, and on-off current ratio. These structures are investigated with the TCAD numerical simulator from Silvaco ATLAS. Furthermore, for the first time, TMG Re-S/D FD SOI MOSFET-based pseudo-NMOS inverter has been designed to observe the device performance at circuit levels. It has been found that the device offers high noise immunity with optimum switching characteristics, and the propagation delay of the studied circuit is recorded as 0.43 ps.

On the positive channel threshold voltage of metal gate electrodes on high-permittivity gate dielectrics

2007 ◽  
Vol 102 (7) ◽  
pp. 074511 ◽  
Author(s):  
J. K. Schaeffer ◽  
D. C. Gilmer ◽  
S. Samavedam ◽  
M. Raymond ◽  
A. Haggag ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Gate Dielectrics ◽  
Metal Gate Electrodes ◽  
Metal Gate ◽  
High Permittivity ◽  
Gate Electrodes

Nanometer-sized patterning of polysilicon thin films by high density plasma etching

2004 ◽  
Vol 467 (1-2) ◽  
pp. 172-175 ◽  
Author(s):  
Young Soo Song ◽  
Jung Woo Kim ◽  
Chee Won Chung
Keyword(s):  
Thin Films ◽  
Plasma Etching ◽  
High Density ◽  
Density Plasma
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