Heat Conduction and Interface Thermal Resistance in Liquid Argon Filled Silver and Graphite Nanochannels

Author(s):  
Murat Barisik ◽  
Ziyuan Shi ◽  
Ali Beskok

Heat conduction between two parallel solid walls separated by liquid argon is investigated using three-dimensional molecular dynamics (MD) simulations. Liquid argon molecules confined in silver and graphite nano-channels are examined separately. Heat flux and temperature distribution within the nano-channels are calculated by maintaining a fixed temperature difference between the two solid surfaces. Temperature profiles are linear sufficiently away from the walls, and heat transfer in liquid argon obeys the Fourier law. Temperature jump due to the interface thermal resistance (i.e., Kapitza length) is characterized as a function of the wall temperature. MD results enabled development of a phenomenological model for the Kapitza length, which is utilized as the coefficient of a Navier-type temperature jump boundary condition using continuum heat conduction equation. Analytical solution of this model results in successful predictions of temperature distribution in liquid-argon confined in silver and graphite nano-channels as thin as 7 nm and 3.57 nm, respectively.

Author(s):  
Koji Nishi ◽  
Tomoyuki Hatakeyama ◽  
Shinji Nakagawa ◽  
Masaru Ishizuka

The thermal network method has a long history with thermal design of electronic equipment. In particular, a one-dimensional thermal network is useful to know the temperature and heat transfer rate along each heat transfer path. It also saves computation time and/or computation resources to obtain target temperature. However, unlike three-dimensional thermal simulation with fine pitch grids and a three-dimensional thermal network with sufficient numbers of nodes, a traditional one-dimensional thermal network cannot predict the temperature of a microprocessor silicon die hot spot with sufficient accuracy in a three-dimensional domain analysis. Therefore, this paper introduces a one-dimensional thermal network with average temperature nodes. Thermal resistance values need to be obtained to calculate target temperature in a thermal network. For this purpose, thermal resistance calculation methodology with simplified boundary conditions, which calculates thermal resistance values from an analytical solution, is also introduced in this paper. The effectiveness of the methodology is explored with a simple model of the microprocessor system. The calculated result by the methodology is compared to a three-dimensional heat conduction simulation result. It is found that the introduced technique matches the three-dimensional heat conduction simulation result well.


1987 ◽  
Vol 12 (4) ◽  
pp. 239-250 ◽  
Author(s):  
R. A. Tatara

A general thermal model to calculate the thermal resistance of a power module having rectangular die and layers has been constructed. The model incorporates a finite element computer program to solve for three-dimensional heat conduction. Effects of voids in the solder regions are included. A sample case is analyzed, and a comparison is made to a recent study.


Author(s):  
Anand Desai ◽  
James Geer ◽  
Bahgat Sammakia

This paper presents the results of an experimental study of steady state heat conduction in a three dimensional stack package. The temperatures are measured at different interfaces within the stacked package. Delphi devices are used in the experiment which enables controlled power input and surface temperature of the devices. The experiment is carried out for three different boundary conditions on the package. The power input in varied to study its effects. A numerical model is created to compare to the experimental results. The results are also compared with the analytical solution presented in Desai et al [5] and Geer et al [6]. The results indicate that the experimental, numerical and analytical solutions follow the same trend. The agreement between the experimental and numerical results improves when the lateral losses are taken into account.


2013 ◽  
Vol 462-463 ◽  
pp. 592-596
Author(s):  
Liang Chen ◽  
Cheng Zhong Hu ◽  
Chun Ling Jiang

A novel multi-finger power SiGe heterojunction bipolar transistor (HBT) with segmented emitter fingers and non-uniform emitter finger spacing was proposed to improve the thermal stability. Thermal simulation for a five-finger power SiGe HBT with novel structure was conducted with ANSYS software. Three-dimensional temperature distribution on emitter fingers was obtained. Compared with traditional emitter structure, the maximum junction temperature of novel structure reduce significantly from 429.025K to 414.252K, the thermal resistance reduce from 159K/W to 141K/W, temperature distribution were significantly improved. Thermal stability was effective enhanced.


2011 ◽  
Vol 133 (9) ◽  
Author(s):  
J. Ordóñez-Miranda ◽  
J. J. Alvarado-Gil

In this work, transient heat transport in a flat layered system, with interface thermal resistance, is analyzed, under the approach of the Cattaneo–Vernotte hyperbolic heat conduction model using the thermal quadrupole method. For a single semi-infinite layer, analytical formulas useful in the determination of its thermal relaxation time as well as its thermal effusivity are obtained. For a composite-layered system, in the long time regime and under a Dirichlet boundary condition, the well-known effective thermal resistance formula and a novel expression for the effective thermal relaxation time are derived, while for a Neumann problem, only a heat capacity identity is found. In contrast in the short time regime, under both Dirichlet and Neumann conditions, an expression that involves the effective thermal diffusivity and relaxation time as a function of the time is derived. In this time regime and under the Fourier approach, a formula for the effective thermal diffusivity in terms of the time, the thermal properties of the individual layers and its interface thermal resistance is obtained. It is shown that these results can be useful in the development of experimental methodologies to perform the thermal characterization of materials in the time domain.


2015 ◽  
Vol 713-715 ◽  
pp. 938-941
Author(s):  
Liang Chen

A novel multi-finger power SiGe heterojunction bipolar transistor (HBT) with non-uniform segmented emitter fingers and non-uniform emitter finger spacing was proposed to improve the thermal stability. Thermal simulation for a five-finger power SiGe HBT with novel structure was conducted with ANSYS software. Three-dimensional temperature distribution on emitter fingers was obtained. Compared with non-uniform segmented emitter fingers structure and non-uniform emitter finger spacing structure, the maximum junction temperature of novel structure reduce significantly, the thermal resistance reduce, temperature distribution were significantly improved. Thermal stability was effective enhanced.


1998 ◽  
Vol 120 (4) ◽  
pp. 977-984 ◽  
Author(s):  
G. A. Ledezma ◽  
A. Bejan

This paper extends to three-dimensional heat conduction the geometric “constructal” method of minimizing the overall thermal resistance between a finite-size volume and a small heat sink. The volume contains (i) low-conductivity material that generates heat at every point, and (ii) a small amount of high-conductivity material that must be distributed optimally in space. The given volume is covered in a sequence of building blocks (volume sizes) that starts with the smallest volume element, and continues toward larger assemblies. It is shown that the overall shape of each building block can be optimized for minimal volume-to-point resistance. The relative thicknesses of the high-conductivity paths can also be optimized. These optima are developed analytically and numerically for the smallest elemental volume and the first assembly. The high-conductivity paths form a tree network that is completely deterministic.


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