Constructal Three-Dimensional Trees for Conduction Between a Volume and One Point

1998 ◽  
Vol 120 (4) ◽  
pp. 977-984 ◽  
Author(s):  
G. A. Ledezma ◽  
A. Bejan

This paper extends to three-dimensional heat conduction the geometric “constructal” method of minimizing the overall thermal resistance between a finite-size volume and a small heat sink. The volume contains (i) low-conductivity material that generates heat at every point, and (ii) a small amount of high-conductivity material that must be distributed optimally in space. The given volume is covered in a sequence of building blocks (volume sizes) that starts with the smallest volume element, and continues toward larger assemblies. It is shown that the overall shape of each building block can be optimized for minimal volume-to-point resistance. The relative thicknesses of the high-conductivity paths can also be optimized. These optima are developed analytically and numerically for the smallest elemental volume and the first assembly. The high-conductivity paths form a tree network that is completely deterministic.

Author(s):  
Koji Nishi ◽  
Tomoyuki Hatakeyama ◽  
Shinji Nakagawa ◽  
Masaru Ishizuka

The thermal network method has a long history with thermal design of electronic equipment. In particular, a one-dimensional thermal network is useful to know the temperature and heat transfer rate along each heat transfer path. It also saves computation time and/or computation resources to obtain target temperature. However, unlike three-dimensional thermal simulation with fine pitch grids and a three-dimensional thermal network with sufficient numbers of nodes, a traditional one-dimensional thermal network cannot predict the temperature of a microprocessor silicon die hot spot with sufficient accuracy in a three-dimensional domain analysis. Therefore, this paper introduces a one-dimensional thermal network with average temperature nodes. Thermal resistance values need to be obtained to calculate target temperature in a thermal network. For this purpose, thermal resistance calculation methodology with simplified boundary conditions, which calculates thermal resistance values from an analytical solution, is also introduced in this paper. The effectiveness of the methodology is explored with a simple model of the microprocessor system. The calculated result by the methodology is compared to a three-dimensional heat conduction simulation result. It is found that the introduced technique matches the three-dimensional heat conduction simulation result well.


2012 ◽  
Vol 65 (12) ◽  
pp. 1662 ◽  
Author(s):  
Zilu Chen ◽  
Chuanbing Zhang ◽  
Xianlin Liu ◽  
Zhong Zhang ◽  
Fupei Liang

A chiral metal-organic framework formulated as [Zn3(L-TMTA)2(4,4′-bpy)4]·24H2O (1) was prepared from the reaction of Zn(NO3)2·6H2O with trimesoyltri(L-alanine) (L-TMTAH3) in the presence of 4,4′-bipyridine (4,4′-bpy). Compound 1 features linear trinuclear secondary building blocks [Zn3(syn-syn-COO)2(μ2,η3-COO)2]2+. Each linear trinuclear secondary building block is further linked to another eight ones around it by four L-TMTA3– ligands and eight 4,4′-bpy ligands, leading to the construction of a uninodal three-dimensional framework with triangular prism-like one-dimensional channels. Dehydrated compound 1 displays remarkable adsorption selectivity on CO2 and water vapour over N2 gas.


1987 ◽  
Vol 12 (4) ◽  
pp. 239-250 ◽  
Author(s):  
R. A. Tatara

A general thermal model to calculate the thermal resistance of a power module having rectangular die and layers has been constructed. The model incorporates a finite element computer program to solve for three-dimensional heat conduction. Effects of voids in the solder regions are included. A sample case is analyzed, and a comparison is made to a recent study.


Author(s):  
Afzal Husain ◽  
Mohd Ariz ◽  
Nasser A. Al-Azri ◽  
Nabeel Z. H. Al-Rawahi ◽  
Mohd. Z. Ansari

The increase in the CPV temperature significantly reduces the efficiency of CPV system. To maintain the CPV temperature under a permissible limit and to utilize the unused heat from the CPVs, an efficient cooling and transportation of coolant is necessary in the system. The present study proposes a new design of hybrid jet impingements/microchannels heat sink with pillars for cooling densely packed PV cells under high concentration. A three-dimensional numerical model was constructed to investigate the thermal performance under steady state, incompressible and laminar flow. A constant heat flux was applied at the base of the substrate to imitate heated CPV surface. The effect of two dimensionless variables, i.e., ratios of standoff (distance from the nozzle exit to impingement surface) to jet diameter and jet pitch to jet diameter was investigated at several flow conditions. The performance of hybrid heat sink was investigated in terms of heat transfer coefficient, pressure-drop, overall thermal resistance and pumping power. The characteristic relationship between the overall thermal resistance and the pumping power was presented which showed an optimum design corresponding to S/Dj = 12 having lower overall thermal resistance and lower pumping power.


Author(s):  
Anjali Chauhan ◽  
Bahgat Sammakia ◽  
Kanad Ghose ◽  
Gamal Refai-Ahmed ◽  
Dereje Agonafer

The stacking of processing and memory components in a three-dimensional (3D) configuration enables the implementation of processing systems with small form factors. Such stacking shortens the interconnection length between processing and memory components to dramatically lower the memory access latencies, and contributes to significant improvements in the memory access bandwidth. Both of these factors elevate overall system performance to levels that are not realizable with prevailing and other proposed solutions. The shorter interconnection lengths in stacked architectures also enable the use of smaller drivers for the interconnections, which in turn reduces interconnection-level energy dissipations. On the down side, stacking of processing and memory components introduces a significant thermal management challenge that is rooted in the high thermal resistance of stacked designs. This paper examines and evaluates three distinct solutions that address thermal management challenges in a system that stacks DRAM components onto a processing core. We primarily focus on three different configurations of a microchannel-based single-phase liquid cooling system with a traditional air-cooled heat sink. Our evaluations, which are intended to study the limits of each solution, assume a uniform power dissipation model for the processor and accounts for the thermal resistance offered by the thermal interface material (TIM), the interconnect layer, and through-silicon vias (TSVs). The liquid-cooled microchannel heat sink shows more promising results when integrated into the package than when added to the microprocessor package from outside.


Author(s):  
Murat Barisik ◽  
Ziyuan Shi ◽  
Ali Beskok

Heat conduction between two parallel solid walls separated by liquid argon is investigated using three-dimensional molecular dynamics (MD) simulations. Liquid argon molecules confined in silver and graphite nano-channels are examined separately. Heat flux and temperature distribution within the nano-channels are calculated by maintaining a fixed temperature difference between the two solid surfaces. Temperature profiles are linear sufficiently away from the walls, and heat transfer in liquid argon obeys the Fourier law. Temperature jump due to the interface thermal resistance (i.e., Kapitza length) is characterized as a function of the wall temperature. MD results enabled development of a phenomenological model for the Kapitza length, which is utilized as the coefficient of a Navier-type temperature jump boundary condition using continuum heat conduction equation. Analytical solution of this model results in successful predictions of temperature distribution in liquid-argon confined in silver and graphite nano-channels as thin as 7 nm and 3.57 nm, respectively.


Author(s):  
Kyle A. Brucker ◽  
Kyle T. Ressler ◽  
Joseph Majdalani

In the cooling of electronic packages, the task of simulating large arrays of heat sinks is often accomplished by the use of compact models. These simpler models attempt to capture the thermal and flow resistance characteristics of a representative heat sink while ignoring secondary detail. In the porous block model, an equivalent thermal conductivity is assigned to the fluid that enters the ‘porous’ space above the heat sink base that was once occupied by the fins. This artificially enhanced thermal conductivity enables the porous block of fluid to exhibit the same thermal resistance as that of the original heat sink. Due to the three-dimensional distribution of the thermal resistance in space, temperature maps associated with the resulting model provide better agreement with detailed numerical simulations than is possible with other models based on two-dimensional flat plate or thin sheet approximations. In this paper, we present closed-form expressions for the equivalent thermal conductivity associated with a large number of heat sink shapes in a forced convection environment.


Author(s):  
Ying Feng Pang ◽  
Elaine P. Scott ◽  
Zhenxian Liang ◽  
J. D. van Wyk

The objective of this work is to quantify the advantages of using double-sided cooling as the thermal management approach for the integrated power electronics modules. To study the potential advantage of the Embedded Power packaging method for the double-sided cooling, experiments were conducted. Three different cases were studied. To eliminate the effect of the heat sink on either side of the module, no heat sink was used in all three cases. The thermal tests were conducted such that the integrated power electronics modules were placed in the middle of flowing air in an insulated wind tunnel. Modules without additional top DBC, with additional top DBC, and with additional top DBC as well as heat spreaders on both sides were tested under the same condition. A common parameter, junction-to-ambient thermal resistance, was used to compare the thermal performance of these three cases. Despite the shortcoming of this parameter in describing the three-dimensional heat flow within the integrated power electronics modules, the concept of the thermal resistance is still worthwhile for evaluating various cooling methods for the module. The results show that increasing the top surface area can help in transferring the heat from the heat source to the ambient through the top side of the module. Consequently, the ability to handle higher power loss can also be increased. In summary, the Embedded Power technology provides an opportunity for implementing double-sided cooling as thermal management approach compared to modules with wire-bonded interconnects for the multichips.


2001 ◽  
Vol 123 (6) ◽  
pp. 1184-1189 ◽  
Author(s):  
M. Neagu and ◽  
A. Bejan

This paper addresses the fundamental problem of how to facilitate the flow of heat across a conducting slab heated from one side. Available for distribution through the system is a small amount of high-conductivity material. The constructal method consists of optimizing geometrically the distribution of the high-conductivity material through the material of lower conductivity. Two-dimensional distributions (plate inserts) and three-dimensional distributions (pin inserts) are optimized based on the numerical simulation of heat conduction in a large number of possible configurations. Results are presented for the external and internal features of the optimized architectures: spacings between inserts, penetration distances, tapered inserts and constant-thickness inserts. The use of optimized pin inserts leads consistently to lower global thermal resistances than the use of plate inserts. The side of the slab that is connected to the high-conductivity intrusions is in effect a “rough” surface. This paper shows that the architecture of a rough surface can be optimized for minimum global contact resistance. Roughness can be designed.


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