Enabling Packaging Architectures and Interconnect Technologies for Image Sensors

Author(s):  
Mei-Chien Lu

Abstract Image sensors have become a crucial technology platform for many applications in the past decades. Market demands continue to grow at a fast pace accelerated by innovations, performance improvement, and new applications. Efficient package architectures and advanced interconnect technologies are among the enablers for the commercialization of image sensors. This study examines how image sensor pixel electronics design and form factor drives innovations in chip stacking and high-density interconnects. 3D chip stacking architectures for CMOS image sensors are analyzed. Cases of image sensors for imaging at visible light, single photon avalanche photodiode (SPAD) for wide dynamic range, rolling shutter and global shutter, and depth sensing and light detection and ranging (LiDAR) are explored based on the pixel electronics requirements. Interconnect methods are also explored. Wafer direct bonding followed by through silicon via (TSV) and hybrid bonding technologies have recently been implemented in the image sensor industry. The preferences and challenges of these two interconnect technologies for image sensor chip stacking are discussed. As TSV technology is relatively mature, this study includes the process flow for one example of the hybrid bonding method. Challenges and future advancement are briefed along with the outlook of the technology and market momentum of image sensors.

Author(s):  
Mei-Chien Lu

Abstract Numerous technology breakthroughs have been made in image sensor development in the past two decades. Image sensors have evolved into a technology platform to support many applications. Their successful implementation in mobile devices has accelerated market demand and established a business platform to propel continuous innovation and performance improvement extending to surveillance, medical, and automotive industries. This overview briefs the general camera module and the crucial technology elements of chip stacking architectures and advanced interconnect technologies. This study will also examine the role of pixel electronics in determining the chip stacking architecture and interconnect technology of choice. It is conducted by examining a few examples of CMOS Image Sensors (CIS) for different functions such as visible light detection, Single Photon Avalanche Photodiode (SPAD) for low light detection, rolling shutter and global shutter, and depth sensing and Light Detection And Ranging (LiDAR). Performance attributes of different architectures of chip stacking are overviewed. Direct bonding followed by Via-last through silicon via (Via-last TSV) and hybrid bonding (HB) technologies are identified as newer and favorable chip-to-chip interconnect technologies for image sensor chip stacking. The state-of-the-art ultra-high-density interconnect manufacturability is also highlighted.


Sensors ◽  
2020 ◽  
Vol 20 (18) ◽  
pp. 5203
Author(s):  
Alessandro Tontini ◽  
Leonardo Gasparini ◽  
Matteo Perenzoni

We present a Montecarlo simulator developed in Matlab® for the analysis of a Single Photon Avalanche Diode (SPAD)-based Complementary Metal-Oxide Semiconductor (CMOS) flash Light Detection and Ranging (LIDAR) system. The simulation environment has been developed to accurately model the components of a flash LIDAR system, such as illumination source, optics, and the architecture of the designated SPAD-based CMOS image sensor. Together with the modeling of the background noise and target topology, all of the fundamental factors that are involved in a typical LIDAR acquisition system have been included in order to predict the achievable system performance and verified with an existing sensor.


Sensors ◽  
2021 ◽  
Vol 21 (2) ◽  
pp. 488
Author(s):  
Susrutha Babu Sukhavasi ◽  
Suparshya Babu Sukhavasi ◽  
Khaled Elleithy ◽  
Shakour Abuzneid ◽  
Abdelrahman Elleithy

Recent technology advances in CMOS image sensors (CIS) enable their utilization in the most demanding of surveillance fields, especially visual surveillance and intrusion detection in intelligent surveillance systems, aerial surveillance in war zones, Earth environmental surveillance by satellites in space monitoring, agricultural monitoring using wireless sensor networks and internet of things and driver assistance in automotive fields. This paper presents an overview of CMOS image sensor-based surveillance applications over the last decade by tabulating the design characteristics related to image quality such as resolution, frame rate, dynamic range, signal-to-noise ratio, and also processing technology. Different models of CMOS image sensors used in all applications have been surveyed and tabulated for every year and application.


Sensors ◽  
2019 ◽  
Vol 19 (24) ◽  
pp. 5459
Author(s):  
Wei Deng ◽  
Eric R. Fossum

This work fits the measured in-pixel source-follower noise in a CMOS Quanta Image Sensor (QIS) prototype chip using physics-based 1/f noise models, rather than the widely-used fitting model for analog designers. This paper discusses the different origins of 1/f noise in QIS devices and includes correlated double sampling (CDS). The modelling results based on the Hooge mobility fluctuation, which uses one adjustable parameter, match the experimental measurements, including the variation in noise from room temperature to –70 °C. This work provides useful information for the implementation of QIS in scientific applications and suggests that even lower read noise is attainable by further cooling and may be applicable to other CMOS analog circuits and CMOS image sensors.


Sensors ◽  
2018 ◽  
Vol 18 (4) ◽  
pp. 1166 ◽  
Author(s):  
Neale Dutton ◽  
Tarek Al Abbas ◽  
Istvan Gyongy ◽  
Francescopaolo Mattioli Della Rocca ◽  
Robert Henderson

Sensors ◽  
2019 ◽  
Vol 19 (9) ◽  
pp. 2073 ◽  
Author(s):  
Kazunari Kurita ◽  
Takeshi Kadono ◽  
Satoshi Shigematsu ◽  
Ryo Hirose ◽  
Ryosuke Okuyama ◽  
...  

We developed silicon epitaxial wafers with high gettering capability by using hydrocarbon–molecular–ion implantation. These wafers also have the effect of hydrogen passivation on process-induced defects and a barrier to out-diffusion of oxygen of the Czochralski silicon (CZ) substrate bulk during Complementary metal-oxide-semiconductor (CMOS) device fabrication processes. We evaluated the electrical device performance of CMOS image sensor fabricated on this type of wafer by using dark current spectroscopy. We found fewer white spot defects compared with those of intrinsic gettering (IG) silicon wafers. We believe that these hydrocarbon–molecular–ion–implanted silicon epitaxial wafers will improve the device performance of CMOS image sensors.


Sensors ◽  
2019 ◽  
Vol 19 (6) ◽  
pp. 1329 ◽  
Author(s):  
Tomoya Nakamura ◽  
Keiichiro Kagawa ◽  
Shiho Torashima ◽  
Masahiro Yamaguchi

A lensless camera is an ultra-thin computational-imaging system. Existing lensless cameras are based on the axial arrangement of an image sensor and a coding mask, and therefore, the back side of the image sensor cannot be captured. In this paper, we propose a lensless camera with a novel design that can capture the front and back sides simultaneously. The proposed camera is composed of multiple coded image sensors, which are complementary-metal-oxide-semiconductor (CMOS) image sensors in which air holes are randomly made at some pixels by drilling processing. When the sensors are placed facing each other, the object-side sensor works as a coding mask and the other works as a sparsified image sensor. The captured image is a sparse coded image, which can be decoded computationally by using compressive sensing-based image reconstruction. We verified the feasibility of the proposed lensless camera by simulations and experiments. The proposed thin lensless camera realized super-field-of-view imaging without lenses or coding masks and therefore can be used for rich information sensing in confined spaces. This work also suggests a new direction in the design of CMOS image sensors in the era of computational imaging.


2020 ◽  
Vol 2020 (7) ◽  
pp. 103-1-103-6
Author(s):  
Taesub Jung ◽  
Yonghun Kwon ◽  
Sungyoung Seo ◽  
Min-Sun Keel ◽  
Changkeun Lee ◽  
...  

An indirect time-of-flight (ToF) CMOS image sensor has been designed with 4-tap 7 μm global shutter pixel in back-side illumination process. 15000 e- of high full-well capacity (FWC) per a tap of 3.5 μm pitch and 3.6 e- of read-noise has been realized by employing true correlated double sampling (CDS) structure with storage gates (SGs). Noble characteristics such as 86 % of demodulation contrast (DC) at 100MHz operation, 37 % of higher quantum efficiency (QE) and lower parasitic light sensitivity (PLS) at 940 nm have been achieved. As a result, the proposed ToF sensor shows depth noise less than 0.3 % with 940 nm illuminator in even long distance.


2015 ◽  
Vol 15 (6) ◽  
pp. 3265-3273 ◽  
Author(s):  
Zhiyuan Gao ◽  
Suying Yao ◽  
Congjie Yang ◽  
Jiangtao Xu

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