Advancement of Chip Stacking Architectures and Interconnect Technologies for Image Sensors

2021 ◽  
Author(s):  
Mei-Chien Lu
Keyword(s):  
Single Photon ◽  
Avalanche Photodiode ◽  
Image Sensor ◽  
Image Sensors ◽  
Successful Implementation ◽  
Market Demand ◽  
Depth Sensing ◽  
Light Detection ◽  
Continuous Innovation ◽  
Cmos Image Sensors

Abstract Numerous technology breakthroughs have been made in image sensor development in the past two decades. Image sensors have evolved into a technology platform to support many applications. Their successful implementation in mobile devices has accelerated market demand and established a business platform to propel continuous innovation and performance improvement extending to surveillance, medical, and automotive industries. This overview briefs the general camera module and the crucial technology elements of chip stacking architectures and advanced interconnect technologies. This study will also examine the role of pixel electronics in determining the chip stacking architecture and interconnect technology of choice. It is conducted by examining a few examples of CMOS Image Sensors (CIS) for different functions such as visible light detection, Single Photon Avalanche Photodiode (SPAD) for low light detection, rolling shutter and global shutter, and depth sensing and Light Detection And Ranging (LiDAR). Performance attributes of different architectures of chip stacking are overviewed. Direct bonding followed by Via-last through silicon via (Via-last TSV) and hybrid bonding (HB) technologies are identified as newer and favorable chip-to-chip interconnect technologies for image sensor chip stacking. The state-of-the-art ultra-high-density interconnect manufacturability is also highlighted.

Enabling Packaging Architectures and Interconnect Technologies for Image Sensors

2020 ◽  
Author(s):  
Mei-Chien Lu
Keyword(s):  
Dynamic Range ◽  
Single Photon ◽  
Avalanche Photodiode ◽  
Image Sensor ◽  
Image Sensors ◽  
Depth Sensing ◽  
Cmos Image Sensors ◽  
Fast Pace ◽  
Bonding Method ◽  
New Applications

Abstract Image sensors have become a crucial technology platform for many applications in the past decades. Market demands continue to grow at a fast pace accelerated by innovations, performance improvement, and new applications. Efficient package architectures and advanced interconnect technologies are among the enablers for the commercialization of image sensors. This study examines how image sensor pixel electronics design and form factor drives innovations in chip stacking and high-density interconnects. 3D chip stacking architectures for CMOS image sensors are analyzed. Cases of image sensors for imaging at visible light, single photon avalanche photodiode (SPAD) for wide dynamic range, rolling shutter and global shutter, and depth sensing and light detection and ranging (LiDAR) are explored based on the pixel electronics requirements. Interconnect methods are also explored. Wafer direct bonding followed by through silicon via (TSV) and hybrid bonding technologies have recently been implemented in the image sensor industry. The preferences and challenges of these two interconnect technologies for image sensor chip stacking are discussed. As TSV technology is relatively mature, this study includes the process flow for one example of the hybrid bonding method. Challenges and future advancement are briefed along with the outlook of the technology and market momentum of image sensors.

scholarly journals Numerical Model of SPAD-Based Direct Time-of-Flight Flash LIDAR CMOS Image Sensors

Sensors ◽  
2020 ◽  
Vol 20 (18) ◽  
pp. 5203
Author(s):  
Alessandro Tontini ◽  
Leonardo Gasparini ◽  
Matteo Perenzoni
Keyword(s):  
Single Photon ◽  
Complementary Metal Oxide Semiconductor ◽  
Image Sensor ◽  
Image Sensors ◽  
Oxide Semiconductor ◽  
Simulation Environment ◽  
Lidar System ◽  
Cmos Image Sensors ◽  
Flash Lidar ◽  
Illumination Source

We present a Montecarlo simulator developed in Matlab® for the analysis of a Single Photon Avalanche Diode (SPAD)-based Complementary Metal-Oxide Semiconductor (CMOS) flash Light Detection and Ranging (LIDAR) system. The simulation environment has been developed to accurately model the components of a flash LIDAR system, such as illumination source, optics, and the architecture of the designated SPAD-based CMOS image sensor. Together with the modeling of the background noise and target topology, all of the fundamental factors that are involved in a typical LIDAR acquisition system have been included in order to predict the achievable system performance and verified with an existing sensor.

Integration Aspects of the Implementation of Through Silicon Vias (TSV) for CMOS Image Sensors

2010 ◽  
Vol 2010 (DPC) ◽  
pp. 000539-000556
Author(s):  
Dave Thomas ◽  
Jean Michailos ◽  
Nicolas Hotellier ◽  
Gilles Metellus ◽  
Francois Guyader ◽  
...  
Keyword(s):  
Silicon Wafer ◽  
Process Integration ◽  
Cmos Technology ◽  
Image Sensor ◽  
Image Sensors ◽  
Successful Implementation ◽  
Wafer Level ◽  
Material Interfaces ◽  
Hard Mask ◽  
Cmos Image Sensors

One of the first device types to benefit from TSV implementation is the CMOS image sensor, an image capture device designed to combine high image quality within a compact form-factor that can be mass produced at low cost. End markets include mobile phones, PDAs and gaming consoles. STMicroelectronics is pioneering their production, based on ≤65nm CMOS technology, at its 300mm facility in Crolles. These sensors employ TSVs as part of a wafer level package allowing the camera module to be directly soldered to a phone PCB thereby saving cost, space and time to manufacture. SPTS's Versalis fxP system is being used to combine multiple TSV formation processes onto one platform including hard-mask deposition, hard-mask etching, TSV etching, partial PMD etching, dielectric liner deposition and spacer etching to define the area for the metal contact. All processes are carried out on a silicon wafer bonded to a glass carrier, through which the final device is illuminated. We will present a TSV silicon etch process for 70 μm x 70 μm Vias in a thinned 300mm silicon wafer on glass carriers with an etch rate uniformity of ≤±1% and sidewall scalloping in the range 80–210 nm. We will show that this process can be conveniently mixed in production with the various oxide etches. A PECVD dielectric liner deposited at <200 °C having excellent coverage, thermal stability and adhesion combined with a breakdown voltage >8 MVcm−1 and leakage current <1E-7 Acm−2 will also be described. Process integration aspects will be discussed using high resolution SEMS to show the key material interfaces in critical areas such as feature corners and along sidewalls. Furthermore the successful implementation of TSV technology on ST's CMOS image sensors will be demonstrated through a combination of electrical characteristics, parametric device data and overall device performance/reliability.

scholarly journals 1/f Noise Modelling and Characterization for CMOS Quanta Image Sensors

Sensors ◽  
2019 ◽  
Vol 19 (24) ◽  
pp. 5459
Author(s):  
Wei Deng ◽  
Eric R. Fossum
Keyword(s):  
Analog Circuits ◽  
Image Sensor ◽  
Image Sensors ◽  
Correlated Double Sampling ◽  
Cmos Image Sensors ◽  
Source Follower ◽  
Cmos Analog Circuits ◽  
Different Origins ◽  
Noise Models ◽  
Fitting Model

This work fits the measured in-pixel source-follower noise in a CMOS Quanta Image Sensor (QIS) prototype chip using physics-based 1/f noise models, rather than the widely-used fitting model for analog designers. This paper discusses the different origins of 1/f noise in QIS devices and includes correlated double sampling (CDS). The modelling results based on the Hooge mobility fluctuation, which uses one adjustable parameter, match the experimental measurements, including the variation in noise from room temperature to –70 °C. This work provides useful information for the implementation of QIS in scientific applications and suggests that even lower read noise is attainable by further cooling and may be applicable to other CMOS analog circuits and CMOS image sensors.

scholarly journals Proximity Gettering Design of Hydrocarbon–Molecular–Ion–Implanted Silicon Wafers Using Dark Current Spectroscopy for CMOS Image Sensors

Sensors ◽  
2019 ◽  
Vol 19 (9) ◽  
pp. 2073 ◽  
Author(s):  
Kazunari Kurita ◽  
Takeshi Kadono ◽  
Satoshi Shigematsu ◽  
Ryo Hirose ◽  
Ryosuke Okuyama ◽  
...  
Keyword(s):  
Dark Current ◽  
Image Sensor ◽  
Image Sensors ◽  
Silicon Wafers ◽  
Device Fabrication ◽  
Oxide Semiconductor ◽  
Device Performance ◽  
Molecular Ion ◽  
Cmos Image Sensors ◽  
Ion Implanted

We developed silicon epitaxial wafers with high gettering capability by using hydrocarbon–molecular–ion implantation. These wafers also have the effect of hydrogen passivation on process-induced defects and a barrier to out-diffusion of oxygen of the Czochralski silicon (CZ) substrate bulk during Complementary metal-oxide-semiconductor (CMOS) device fabrication processes. We evaluated the electrical device performance of CMOS image sensor fabricated on this type of wafer by using dark current spectroscopy. We found fewer white spot defects compared with those of intrinsic gettering (IG) silicon wafers. We believe that these hydrocarbon–molecular–ion–implanted silicon epitaxial wafers will improve the device performance of CMOS image sensors.

scholarly journals Super Field-of-View Lensless Camera by Coded Image Sensors

Sensors ◽  
2019 ◽  
Vol 19 (6) ◽  
pp. 1329 ◽  
Author(s):  
Tomoya Nakamura ◽  
Keiichiro Kagawa ◽  
Shiho Torashima ◽  
Masahiro Yamaguchi
Keyword(s):  
Imaging System ◽  
Complementary Metal Oxide Semiconductor ◽  
Image Sensor ◽  
Image Sensors ◽  
Computational Imaging ◽  
Field Of View ◽  
Oxide Semiconductor ◽  
Back Side ◽  
Cmos Image Sensors ◽  
Rich Information

A lensless camera is an ultra-thin computational-imaging system. Existing lensless cameras are based on the axial arrangement of an image sensor and a coding mask, and therefore, the back side of the image sensor cannot be captured. In this paper, we propose a lensless camera with a novel design that can capture the front and back sides simultaneously. The proposed camera is composed of multiple coded image sensors, which are complementary-metal-oxide-semiconductor (CMOS) image sensors in which air holes are randomly made at some pixels by drilling processing. When the sensors are placed facing each other, the object-side sensor works as a coding mask and the other works as a sparsified image sensor. The captured image is a sparse coded image, which can be decoded computationally by using compressive sensing-based image reconstruction. We verified the feasibility of the proposed lensless camera by simulations and experiments. The proposed thin lensless camera realized super-field-of-view imaging without lenses or coding masks and therefore can be used for rich information sensing in confined spaces. This work also suggests a new direction in the design of CMOS image sensors in the era of computational imaging.

A 4-tap global shutter pixel with enhanced IR sensitivity for VGA time-of-flight CMOS image sensors

2020 ◽  
Vol 2020 (7) ◽  
pp. 103-1-103-6
Author(s):  
Taesub Jung ◽  
Yonghun Kwon ◽  
Sungyoung Seo ◽  
Min-Sun Keel ◽  
Changkeun Lee ◽  
...  
Keyword(s):  
Time Of Flight ◽  
Light Sensitivity ◽  
Image Sensor ◽  
Image Sensors ◽  
Double Sampling ◽  
Back Side ◽  
Long Distance ◽  
Correlated Double Sampling ◽  
Cmos Image Sensors ◽  
Side Illumination

An indirect time-of-flight (ToF) CMOS image sensor has been designed with 4-tap 7 μm global shutter pixel in back-side illumination process. 15000 e- of high full-well capacity (FWC) per a tap of 3.5 μm pitch and 3.6 e- of read-noise has been realized by employing true correlated double sampling (CDS) structure with storage gates (SGs). Noble characteristics such as 86 % of demodulation contrast (DC) at 100MHz operation, 37 % of higher quantum efficiency (QE) and lower parasitic light sensitivity (PLS) at 940 nm have been achieved. As a result, the proposed ToF sensor shows depth noise less than 0.3 % with 940 nm illuminator in even long distance.

scholarly journals A CMOS voltage-mode image sensing system

2021 ◽  
Author(s):  
Jun Long Zhang
Keyword(s):  
Cmos Image Sensor ◽  
Cmos Technology ◽  
Image Sensor ◽  
Electrical Signal ◽  
Image Sensors ◽  
Analog To Digital ◽  
Light Sensing ◽  
Image Sensing ◽  
Cmos Image Sensors ◽  
Pixel Sensors

A CMOS image sensor consists of a light sensing region that converts photonic energy to an electrical signal and a peripheral circuitry that performs signal conditioning and post-processing. This project investgates the principle and design of CMOS active image sensors. The basic concepts and principle of CMOS image sensors are investigated. The advantages of CMOS image sensors over charge-coupled device (CCD) image sensors are presented. Both passive pixel sensors (PPS) and acive pixel sensors (APS) are examined in detail. The noise of CMOS image sensors is investigated and correlated double sampling (CDS) techniques are examined. The design of APS arrays, CDS circuits and 8-bit analog to-digital converters in TSMC-0.18μm 1.8V CMOS technology is presented. The simulation results and layout of the designed CMOS image sensor are presented.

scholarly journals A Novel Hybrid CMOS Pixel-Cluster for Local Light Angle, Polarization and Intensity Detection with Determination of Stokes Parameters

2018 ◽  
Vol 13 (2) ◽  
pp. 1-10 ◽  
Author(s):  
Francelino Freitas Carvalho ◽  
Carlos Augusto de Moraes Cruz ◽  
Greicy C. Marques ◽  
Thiago Brito Bezerra
Keyword(s):  
Incident Angle ◽  
Image Sensors ◽  
Stokes Parameters ◽  
New Paradigm ◽  
Depth Sensing ◽  
3D Image Reconstruction ◽  
Cmos Image Sensors ◽  
Hybrid Cmos ◽  
Desirable Feature

Detecting local light incident angle is a desirable feature for CMOS image sensors for 3D image reconstruction purposes and depth sensing. Advances in the CMOS technologies in the last years have enabled integrated solutions to perform such a job. However, it is still not viable to implement such a feature in regular CMOS image sensors due to the great number of pixels in a cluster to perform incident angle detection. In this paper, a hybrid cluster with only four pixels, instead of eight pixels of previous solutions, that is able to detect both local light intensity, incident angle and Stokes parameters. The technique to detect local incident angle is widely exploited in the literature. Three novelties are explored in this work, the first is the new paradigm in polarization cluster-pixel design, the second is the extended ability of metal shielded pixels to detect both the local light angle and intensity and the third is to determine the Stokes parameters through this sensor. SPICE simulation results show that the existing Quadrature Pixel Cluster - QPC and Polarization Pixel Cluster - PPC models are in accordance with experimental results presented in the literature, and thus it was possible to demonstrate similar behavior in the new proposed pixel cluster.

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