Co-Placement for Pin-Fin Based Micro-Fluidically Cooled 3D ICs

2015 ◽  
Author(s):  
Zhiyuan Yang ◽  
Ankur Srivastava
Keyword(s):  
High Performance ◽  
Flow Direction ◽  
Heat Removal ◽  
Cooling Capacity ◽  
Wire Length ◽  
Pin Fin ◽  
3D Ics ◽  
The Wire ◽  
Silicon Vias ◽  
The Cost

3D ICs with through-silicon vias (TSVs) can achieve high performance while exacerbating the problem of heat removal. This necessitates the use of more aggressive cooling solutions such as micropin-fin based fluidic cooling. However, micropin-fin cooling comes with overheads such as non-uniform cooling capacity along the flow direction and restriction on the position of TSVs to where pins exist. 3D gate and TSV placement approaches un-aware of these drawbacks may lead to detrimental effects and even infeasible chip design. In this paper, we present a hierarchical partitioning based algorithm for co-placing gates and TSVs to co-optimize the wire-length and in-layer temperature uniformity, given the logical level netlist and layer assignment of gates. Compared to the wire-length driven gate placement followed by a TSV legalization stage, our approach can achieve up to 75% and 25% reduction of in-layer temperature variation and peak temperature, respectively, with the cost of 13% increase in wire-length.

Cost Drivers for 2.5D and 3D Applications

2013 ◽  
Vol 2013 (DPC) ◽  
pp. 000334-000346
Author(s):  
Chet Palesko ◽  
E. Jan Vardaman ◽  
Alan Palesko
Keyword(s):  
High Performance ◽  
Specific Activity ◽  
Cost Effective ◽  
Cost Models ◽  
Network Systems ◽  
Cost Drivers ◽  
Technology Applications ◽  
Silicon Vias ◽  
The Cost ◽  
3D Applications

2.5D and 3D applications using through silicon vias (TSVs) are increasingly being considered as a packaging alternative. Miniaturization and high performance product requirements are driving this move – even though in many cases the cost of both 2.5D and 3D is still high. The primary applications for 2.5D interposers with TSVs are GPUs/CPUs, high-end ASICs, and FPGAs. Adoption for FPGAs has already started. The key to the performance gains in recently introduced FPGAs is the partitioning of an FPGA die into four “slices” that are mounted on a silicon interposer or what Xilinx calls its Stacked Silicon Interconnect technology. Applications for interposers include tablets, gaming, and high-end computing and network systems. The drivers are mainly partitioning large die, integrating single chips into a module, reducing die size where substrate density is the constraint, and using the interposer to minimize the stress on large die that are fabricated with extra-low-k (ELK) dielectrics. The primary applications for 3D solutions are stacked memory cubes and memory plus logic. The true 3D nature of stacking all active silicon allows better miniaturization, but yield issues can quickly drive the cost unacceptably high. This analysis examines the cost drivers for 2.5D and 3D applications. Activity based cost models will be used to analyze the complete cost of fabricating and assembling active die on a silicon interposer and active die stacking on other active die. Total product cost impact - not just the cost of a specific activity - is the focus of this analysis. Since yields play a major role in cost, a sensitivity analysis of the different yields including die yield before wafer probe, die yield after wafer probe, TSV yield, interposer yield, assembly yield, substrate yield, etc. will be presented. The critical yield points in the manufacturing flow and dominant activity cost drivers (equipment, material, and /or labor) will be presented as well as suggested minimum thresholds for 2.5D and 3D technology to be a cost effective technology.

Cost Comparison of 2.5D/3D Packaging to other Packaging Technologies

2013 ◽  
Vol 2013 (1) ◽  
pp. 000429-000433
Author(s):  
Chet Palesko ◽  
Amy Palesko ◽  
E. Jan Vardaman
Keyword(s):  
Cost Reduction ◽  
High Performance ◽  
Cost Comparison ◽  
Through Silicon Vias ◽  
Cost Drivers ◽  
3D Packaging ◽  
Silicon Vias ◽  
The Cost ◽  
3D Applications

2.5D and 3D applications using through silicon vias (TSVs) are increasingly being considered as an alternative to conventional packaging. Miniaturization and high performance product requirements are driving this move, although in many cases the cost of both 2.5D and 3D is still high. In this paper we will identify the major cost drivers for 2.5D and 3D packaging and assess cost reduction progress, including current costs versus expected future costs. We will also compare these costs to alternative packaging.

Compact Transient Thermal Model of Microfluidically Cooled Three-Dimensional Stacked Chips With Pin-Fin Enhanced Microgap

2021 ◽  
Vol 143 (3) ◽  
Author(s):  
Yuanchen Hu ◽  
Md Obaidul Hossen ◽  
Zhimin Wan ◽  
Muhannad S. Bakir ◽  
Yogendra Joshi
Keyword(s):  
Heat Transfer ◽  
Integrated Circuit ◽  
High Performance ◽  
Heat Dissipation ◽  
Three Dimensional ◽  
Heat Removal ◽  
Power Estimation ◽  
Leakage Power ◽  
Pin Fin ◽  
Pin Fins

Abstract Three-dimensional (3D) stacked integrated circuit (SIC) chips are one of the most promising technologies to achieve compact, high-performance, and energy-efficient architectures. However, they face a heat dissipation bottleneck due to the increased volumetric heat generation and reduced surface area. Previous work demonstrated that pin-fin enhanced microgap cooling, which provides fluidic cooling between layers could potentially address the heat dissipation challenge. In this paper, a compact multitier pin-fin single-phase liquid cooling model has been established for both steady-state and transient conditions. The model considers heat transfer between layers via pin-fins, as well as the convective heat removal in each tier. Spatially and temporally varying heat flux distribution, or power map, in each tier can be modeled. The cooling fluid can have different pumping power and directions for each tier. The model predictions are compared with detailed simulations using computational fluid dynamics/heat transfer (CFD/HT). The compact model is found to run 120–600 times faster than the CFD/HT model, while providing acceptable accuracy. Actual leakage power estimation is performed in this codesign model, which is an important contribution for codesign of 3D-SICs. For the simulated cases, temperatures could decrease 3% when leakage power estimation is adopted. This model could be used as electrical-thermal codesign tool to optimize thermal management and reduce leakage power.

Electrical Interconnect and Microfluidic Cooling Within 3D ICs and Silicon Interposer

2014 ◽  
Author(s):  
Hanju Oh ◽  
Yue Zhang ◽  
Li Zheng ◽  
Muhannad S. Bakir
Keyword(s):  
Integrated Circuits ◽  
Thermal Gradient ◽  
Heat Dissipation ◽  
Three Dimensional ◽  
Heat Removal ◽  
3D Ic ◽  
Significant Challenge ◽  
3D Ics ◽  
Silicon Vias ◽  
First Time

Heat dissipation is a significant challenge for three-dimensional integrated circuits (3D IC) due to the lack of heat removal paths and increased power density. In this paper, a 3D IC system with an embedded microfluidic cooling heat sink (MFHS) is presented. In the proposed 3D IC system, high power tiers contain embedded MFHS and high-aspect ratio (23:1) through-silicon-vias (TSVs) routed through the integrated MFHS. In addition, each tier has dedicated solder-based microfluidic chip I/Os. Microfluidic cooling experiments of staggered micropin-fins with embedded TSVs are presented for the first time. Moreover, the lateral thermal gradient across a chip is analyzed with segmented heaters.

The Use of a Hot-Wire Anemometer in Turbulent Flow

1967 ◽  
Vol 71 (679) ◽  
pp. 511-513 ◽  
Author(s):  
B. J. Hoole ◽  
J. R. Calvert
Keyword(s):  
Turbulent Flow ◽  
Flow Direction ◽  
Unsteady Flows ◽  
Wire Length ◽  
Hot Wire ◽  
Velocity Measurements ◽  
Local Flow ◽  
The Wire ◽  
Stream Direction

The hot-wire anemometer is one of the few instruments which can be used to make velocity measurements in turbulent and unsteady flows. However, the probe supporting the wire inevitably interferes with the local flow and it has been found that the effect of this interference on the reading of the anemometer varies considerably as the orientation of the probe to the flow direction is changed (the wire itself being maintained in the same direction). This leads to errors in any measurements taken where the instantaneous local flow direction differs significantly at any time from the direction for which the anemometer was calibrated. Such errors are quite separate from, and in addition to, errors due to finite wire length, incidence of the wire to the local stream direction, etc.

Development of Wire Suspended Robot System (ARANEUS 2.0) for Bridge Inspection

10.29007/zw9k ◽  
2020 ◽  
Author(s):  
Kazuhide Nakata ◽  
Kazuki Umemoto ◽  
Kenji Kaneko ◽  
Ryusuke Fujisawa
Keyword(s):  
Unmanned Aerial Vehicle ◽  
Concrete Surface ◽  
Wire Length ◽  
High Definition ◽  
Bridge Inspection ◽  
Robot System ◽  
Inspection Method ◽  
Aerial Vehicle ◽  
The Wire

This study addresses the development of a robot for inspection of old bridges. By suspending the robot with a wire and controlling the wire length, the movement of the robot is realized. The robot mounts a high-definition camera and aims to detect cracks on the concrete surface of the bridge using this camera. An inspection method using an unmanned aerial vehicle (UAV) has been proposed. Compared to the method using an unmanned aerial vehicle, the wire suspended robot system has the advantage of insensitivity to wind and ability to carry heavy equipments, this makes it possible to install a high-definition camera and a cleaning function to find cracks that are difficult to detect due to dirt.

Based on Numerical Simulation of High-Performance Parallel Machine Muffler Experimental Calibration

2013 ◽  
Vol 718-720 ◽  
pp. 1645-1650
Author(s):  
Gen Yin Cheng ◽  
Sheng Chen Yu ◽  
Zhi Yong Wei ◽  
Shao Jie Chen ◽  
You Cheng
Keyword(s):  
Numerical Simulation ◽  
Finite Element ◽  
Boundary Element ◽  
Message Passing ◽  
High Performance ◽  
Message Passing Interface ◽  
Parallel Machine ◽  
Simulation Software ◽  
Experimental Calibration ◽  
The Cost

Commonly used commercial simulation software SYSNOISE and ANSYS is run on a single machine (can not directly run on parallel machine) when use the finite element and boundary element to simulate muffler effect, and it will take more than ten days, sometimes even twenty days to work out an exact solution as the large amount of numerical simulation. Use a high performance parallel machine which was built by 32 commercial computers and transform the finite element and boundary element simulation software into a program that can running under the MPI (message passing interface) parallel environment in order to reduce the cost of numerical simulation. The relevant data worked out from the simulation experiment demonstrate that the result effect of the numerical simulation is well. And the computing speed of the high performance parallel machine is 25 ~ 30 times a microcomputer.

Effects of Pin Shape and Array Orientation on Heat Transfer and Pressure Loss in Pin Fin Arrays

1984 ◽  
Vol 106 (1) ◽  
pp. 252-257 ◽  
Author(s):  
D. E. Metzger ◽  
C. S. Fan ◽  
S. W. Haley
Keyword(s):  
Heat Transfer ◽  
Cross Section ◽  
Pressure Loss ◽  
Flow Direction ◽  
Circular Cross Section ◽  
Cycle Performance ◽  
Mean Flow ◽  
Pin Fin ◽  
The Mean ◽  
Cooling Air

Modern high-performance gas turbine engines operate at high turbine inlet temperatures and require internal convection cooling of many of the components exposed to the hot gas flow. Cooling air is supplied from the engine compressor at a cost to cycle performance and a design goal is to provide necessary cooling with the minimum required cooling air flow. In conjunction with this objective, two families of pin fin array geometries which have potential for improving airfoil internal cooling performance were studied experimentally. One family utilizes pins of a circular cross section with various orientations of the array with respect to the mean flow direction. The second family utilizes pins with an oblong cross section with various pin orientations with respect to the mean flow direction. Both heat transfer and pressure loss characteristics are presented. The results indicate that the use of circular pins with array orientation between staggered and inline can in some cases increase heat transfer while decreasing pressure loss. The use of elongated pins increases heat transfer, but at a high cost of increased pressure loss. In conjunction with the present measurements, previously published results were reexamined in order to estimate the magnitude of heat transfer coefficients on the pin surfaces relative to those of the endwall surfaces. The estimate indicates that the pin surface coefficients are approximately double the endwall values.

Digital monitoring system of equipment for the analysis of fuel and lubricants quality

2021 ◽  
Vol 04 (1) ◽  
pp. 54-54
Author(s):  
V. R. Nigmatullin ◽  
◽  
I. R. Nigmatullin ◽  
R. G. Nigmatullin ◽  
A.M. Migranov ◽  
...  
Keyword(s):  
Monitoring System ◽  
High Performance ◽  
Chemical Elements ◽  
Large Data ◽  
Climatic Conditions ◽  
Point Of View ◽  
Friction Units ◽  
Digital Monitoring ◽  
Wear Products ◽  
The Cost

Currently, to increase the efficiency of industrial production, high-performance and expensive technological equipment is increasingly used, in which the weakest link, from the point of view of efficiency and reliability, is the components and parts of heavily loaded tribo – couplings operating both at significantly different temperatures (conditionally under lighter conditions, the temperature difference can be 100-120 degrees) and climatic conditions (high humidity, the presence of abrasives and other chemical elements in the atmosphere). As the results of the analysis of the frequency of failures of friction units and, accordingly, the cost of their restoration reach 9-20 percent of the cost of all equipment, without taking into account significant losses of income (profit) of the enterprise from downtime. The solution of this problem is based on the study of the wear rate of friction units by the wear products accumulated in working oils, cooling lubricants, and greases. A digital equipment monitoring system (DSMT) has been developed and implemented, which includes dynamic recording of the number of wear products and oil temperature by original modern recording devices, followed by the technology of their processing and use. The system also includes methods for finding the necessary information in large data sets useful and necessary in theoretical and practical terms with a similar technique controlled by a digital monitoring system. The advantages of SMT are the ability to predict the reliability of the equipment; reduce production risks and significantly reduce inefficient costs.

scholarly journals A Bit String Content Aware Chunking Strategy for Reduced CPU Energy on Cloud Storage

2015 ◽  
Vol 2015 ◽  
pp. 1-8 ◽  
Author(s):  
Bin Zhou ◽  
ShuDao Zhang ◽  
Ying Zhang ◽  
JiaHao Tan
Keyword(s):  
Energy Consumption ◽  
Data Center ◽  
System Performance ◽  
Cloud Storage ◽  
High Performance ◽  
Factors Affecting ◽  
Redundant Data ◽  
Energy Factors ◽  
The Cost ◽  
Content Aware

In order to achieve energy saving and reduce the total cost of ownership, green storage has become the first priority for data center. Detecting and deleting the redundant data are the key factors to the reduction of the energy consumption of CPU, while high performance stable chunking strategy provides the groundwork for detecting redundant data. The existing chunking algorithm greatly reduces the system performance when confronted with big data and it wastes a lot of energy. Factors affecting the chunking performance are analyzed and discussed in the paper and a new fingerprint signature calculation is implemented. Furthermore, a Bit String Content Aware Chunking Strategy (BCCS) is put forward. This strategy reduces the cost of signature computation in chunking process to improve the system performance and cuts down the energy consumption of the cloud storage data center. On the basis of relevant test scenarios and test data of this paper, the advantages of the chunking strategy are verified.

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