Effect of Compressive Loading on the Interconnect Reliability Under Thermal Cycling

Author(s):  
Da Yu ◽  
Tung Nguyen ◽  
Ho H. Lee ◽  
Namseo Goo ◽  
S. B. Park

The ever increasing power density in modern semiconductor devices requires heat dissipation solution such as heat sink to remove the heat away from the device. A compressive loading was applied to reduce the interfacial thermal resistance between package and heat sink. In this study both numerical modeling and experimental approaches were employed to study the effect of compressive loading on the interconnect reliability, especially for high power density package, under thermal cycling loading conditions. The JEDEC standard thermal cycle tests were conducted and the resistance of the daisy chained circuits was in-situ measured to record the failure time. The failure analysis has been performed to indentify the failure modes of solder joint with and without the presence of compressive loading. A finite element based thermal fatigue life prediction model for SAC305 solder joint under compressive loading was also developed and validated with the experimental results.

2012 ◽  
Vol 134 (4) ◽  
Author(s):  
Da Yu ◽  
Hohyung Lee ◽  
Seungbae Park

The ever increasing power density in modern semiconductor devices requires heat dissipation solution such as heat sink to remove heat away from the device. A compressive loading is usually applied to reduce the interfacial thermal resistance between package and heat sink. In this paper, both experimental approaches and numerical modeling were employed to study the effect of compressive loading on the interconnect reliability under thermal cycling conditions. A special loading fixture which simulated the heat sink was designed to apply compressive loading to the package. The JEDEC standard thermal cycle tests were performed and the resistance of daisy chained circuits was in situ measured. The time to crack initiation and time to permanent failure were identified separately based on in situ resistance measurement results. Failure analysis has been performed to identify the failure modes of solder joint with and without the presence of compressive loading. A finite element based thermal-fatigue life prediction model for SAC305 solder joint under compressive loading was also developed to understand the thermal-fatigue crack behaviors of solder joint and successfully validated with the experimental results.


Author(s):  
Gary L. Solbrekken ◽  
Kazuaki Yazawa ◽  
Avram Bar-Cohen

It is well established that the power dissipation for electronic components is increasing. At the same time, high performance portable equipment with volume, weight, and power limitations are gaining widespread acceptance in the marketplace. The combination of the above conditions requires thermal solutions that are high performance and yet small, light, and power efficient. This paper explores the possibility of using thermoelectric (TE) refrigeration as an integrated solution for portable electronic equipment accounting for heat sink and interface material thermal resistances. The current study shows that TE refrigeration can indeed have a benefit over using just a heat sink. Performance maps illustrating where TE refrigeration offers an advantage over an air-cooled heat sink are created for a parametric range of CPU heat flows, heat sink thermal resistances, and TE material properties. During the course of the study, it was found that setting the TE operating current based on minimizing the CPU temperature (Tj), as opposed to maximizing the amount of heat pumping, significantly reduces Tj. For the baseline case studied, a reduction of 20–30°C was demonstrated over a range of CPU heat dissipation. The parametric studies also illustrate that management of the heat sink thermal resistance appears to be more critical than the CPU/TE interfacial thermal resistance. However, setting the TE current based on a minimum Tj as opposed to maximum heat pumping reduces the system sensitivity to the heat sink thermal resistance.


1991 ◽  
Vol 113 (1) ◽  
pp. 8-15 ◽  
Author(s):  
Tsung-Yu Pan

When an electronic package is subjected to thermal cycling, the solder joint interconnects are subjected to a complex stress system. If the stress is sufficiently large, the solder joint will show evidence of plastic flow along with microstructure coarsening and possible fatigue crack initiation and propagation. Plastic flow has not been studied as thoroughly as the later two phenomena although it is often observed at surface mount or through-hole solder joints. The thermal expansion mismatch between different materials in the package is responsible for the plastic deformation which accumulates with thermal cycling. In this study, the accumulated plastic deformation process is modelled with finite element (FE) methods and compared with experimental results. Lead-frame solder joints have been analyzed with a nonlinear FE program using temperature and time-dependent properties. Steady-state creep is considered using data for eutectic lead/tin solder which is described by a hyperbolic sine creep law: ε = A(sinh Bσ)ndmexp(−Q/RT). The analysis correctly simulates the large plastic flow found experimentally in a lead-frame solder joint. The resulting stress and strain distributions indicate possible failure modes which are not anticipated on the basis of uniform shear assumptions or predictable from an FE analysis of the initial geometry.


2013 ◽  
Vol 2013 (1) ◽  
pp. 000467-000472
Author(s):  
Gerard McVicker ◽  
Vijay Khanna ◽  
Sri M. Sri-Jayantha

A Blade Server System (BSS) utilizes Voltage Regulator Modules (VRM), in the form of Quad Flat No-Lead (QFN) devices, to provide power distribution to various components on the system board. Depending on the power requirements of the circuit, these VRM's can be mounted as single devices or banked together. In addition, the power density of the VRM can be high enough to warrant heat dissipation through the use of a heat sink. Typically, during field conditions (FC) the BSS are powered on and off up to four times per day, with their ambient temperature cycling between 25°C and 80°C. This cyclical temperature gradient drives inelastic strain in the solder joints due to the coefficient of thermal expansion (CTE) mismatch between the QFN and the circuit card. In addition, the heat sink, coupled to the QFN and the circuit card, can induce additional inelastic solder joint strain, resulting in early solder joint fatigue failure. To understand the effect of the heat sink mounting, a FEM (Finite Element Model) of four QFN's mounted to a BSS circuit card was developed. The model was exercised to calculate the maximum strain energy in a critical joint, due to the cyclical straining, and the results were compared for a QFN with and without a heat sink. It was determined that the presence of the heat sink did contribute to higher strain energy and therefore could lead to earlier joint failure. While the presence of the heat sink is required, careful design of the mounting should be employed to provide lateral slip, essentially decoupling the heat sink from the QFN joint strain. Details of the modeling and results, along with DIC (Digital Image Correlation) measurements of heat sink lateral slip, are presented.


Author(s):  
Davood Ghaderi ◽  
Maryam Pourmahdavi ◽  
Vahid Samavatian ◽  
Omid Mir ◽  
Majid Samavatian

In this work, the combination of vibration loading and thermal cycle effects on the fatigue properties of a solder joint in a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) discrete was investigated. The fatigue mechanism under each loading mode was individually analyzed, and then according to the incremental damage superposition approach, the simultaneous effects were thoroughly studied. Under thermal cycling, the creep behavior of the solder is linked to the fatigue life. In fact, the creep accumulated strain in each thermal cycle has a straight relation to the failure time of solder joint. The origin of stress/strain in the assembly is owing to the sharp difference between coefficients of thermal expansions of the components in the electronic package. Regarding the vibration loading, the root mean square of peeling stress as a widely acceptable failure indicator was used to evaluate the vibration effects on the fatigue life. It is determined that the maximum stress is concentrated at the corner of solder layer. This result was similar to the outcomes of thermal cycling. The results also indicated that the combination of thermal and mechanical loadings accelerates the failure of the solder joint of the power MOSFET. Furthermore, the experimental and simulation studies showed similar results and approved the crack initiation at the corner of solder layer.


2014 ◽  
Vol 11 (2) ◽  
pp. 80-86
Author(s):  
Gerard McVicker ◽  
Vijay Khanna ◽  
M. Sri-Jayantha

A blade server system (BSS) utilizes voltage regulator modules (VRMs), in the form of quad flat no-lead (QFN) devices, to provide power distribution to various components on the system board. Depending on the power requirements of the circuit, these VRMs can be mounted as single devices or banked together. In addition, the power density of the VRM can be high enough to warrant heat dissipation through the use of a heat sink. Typically, at field conditions (FCs), the BSS are powered on and off up to four times per day, with their ambient temperature cycling between 25°C and 80°C. This cyclical temperature gradient drives inelastic strain in the solder joints due to the coefficient of thermal expansion (CTE) mismatch between the QFN and the circuit card. In addition, the heat sink, coupled with the QFN and the circuit card, can induce additional inelastic solder joint strain, resulting in early solder joint fatigue failure. To understand the effect of the heat sink mounting, a FEM (finite element model) of four QFNs mounted to a BSS circuit card was developed. The model was exercised to calculate the maximum strain energy in a critical joint due to cyclic strain, and the results were compared for a QFN with and without a heat sink. It was determined that the presence of the heat sink did contribute to higher strain energy and therefore could lead to earlier joint failure. Although the presence of the heat sink is required, careful design of the mounting should be employed to provide lateral slip, essentially decoupling the heat sink from the QFN joint strain. Details of the modeling and results, along with DIC (digital image correlation) measurements of heat sink lateral slip, are presented.


Metals ◽  
2021 ◽  
Vol 11 (2) ◽  
pp. 196
Author(s):  
Yaqiang Li ◽  
Hongyu Zhou ◽  
Chunjing Wu ◽  
Zheng Yin ◽  
Chang Liu ◽  
...  

The coefficients of thermal expansion (CTE) and thermal conductivity (TC) are important for heat sink applications, as they can minimize stress between heat sink substrates and chips and prevent failure from thermal accumulation in electronics. We investigated the interface behavior and manufacturing of diamond/Cu composites and found that they have much lower TCs than copper due to their low densities. Most defects, such as cavities, form around diamond particles, substantially decreasing the high TC of diamond reinforcements. However, the measurement results for the Cu-coated diamond/Cu composites are unsatisfactory because the nanosized copper layer on the diamond surface grew and spheroidized at elevated sintering temperatures. Realizing ideal interfacial bonding between a copper matrix and diamond particles is difficult. The TC of the 40 vol.% Ti-coated diamond/Cu composite is 475.01 W m−1 K−1, much higher than that of diamond/Cu and Cu-coated diamond/Cu composites under equivalent manufacturing conditions. The minimally grown titanium layer retained its nanosized and was consistent with the sintering temperature. Depositing a nanosized titanium layer on a diamond surface will strengthen interfacial bonding through interface reactions among the copper matrix, nanosized titanium layer and diamond particles, reducing the interfacial thermal resistance and exploiting the high TC of diamond particles, even if defects from powder metallurgy remain. These results provide an important experimental and theoretical basis for manufacturing diamond/Cu composites for heat sink applications.


Crystals ◽  
2021 ◽  
Vol 11 (7) ◽  
pp. 733
Author(s):  
Lu Liu ◽  
Songbai Xue ◽  
Ruiyang Ni ◽  
Peng Zhang ◽  
Jie Wu

In this study, a Sn–Bi composite solder paste with thermosetting epoxy (TSEP Sn–Bi) was prepared by mixing Sn–Bi solder powder, flux, and epoxy system. The melting characteristics of the Sn–Bi solder alloy and the curing reaction of the epoxy system were measured by differential scanning calorimeter (DSC). A reflow profile was optimized based on the Sn–Bi reflow profile, and the Organic Solderability Preservative (OSP) Cu pad mounted 0603 chip resistor was chosen to reflow soldering and to prepare samples of the corresponding joint. The high temperature and humidity reliability of the solder joints at 85 °C/85% RH (Relative Humidity) for 1000 h and the thermal cycle reliability of the solder joints from −40 °C to 125 °C for 1000 cycles were investigated. Compared to the Sn–Bi solder joint, the TSEP Sn–Bi solder joints had increased reliability. The microstructure observation shows that the epoxy resin curing process did not affect the transformation of the microstructure. The shear force of the TSEP Sn–Bi solder joints after 1000 cycles of thermal cycling test was 1.23–1.35 times higher than the Sn–Bi solder joint and after 1000 h of temperature and humidity tests was 1.14–1.27 times higher than the Sn–Bi solder joint. The fracture analysis indicated that the cured cover layer could still have a mechanical reinforcement to the TSEP Sn–Bi solder joints after these reliability tests.


Author(s):  
Nico Setiawan Effendi ◽  
Kyoung Joon Kim

A computational study is conducted to explore thermal performances of natural convection hybrid fin heat sinks (HF HSs). The proposed HF HSs are a hollow hybrid fin heat sink (HHF HS) and a solid hybrid fin heat sink (SHF HS). Parametric effects such as a fin spacing, an internal channel diameter, a heat dissipation on the performance of HF HSs are investigated by CFD analysis. Study results show that the thermal resistance of the HS increases while the mass-multiplied thermal resistance of the HS decreases associated with the increase of the channel diameter. The results also shows the thermal resistance of the SHF HS is 13% smaller, and the mass-multiplied thermal resistance of the HHF HS is 32% smaller compared with the pin fin heat sink (PF HS). These interesting results are mainly due to integrated effects of the mass-reduction, the surface area enhancement, and the heat pumping via the internal channel. Such better performances of HF HSs show the feasibility of alternatives to the conventional PF HS especially for passive cooling of LED lighting modules.


Author(s):  
Zhuo Cui

This paper presents the effects of heat dissipation performance of pin fins with different heat sink structures. The heat dissipation performance of two types of pin fin arrays heat sink are compared through measuring their heat resistance and the average Nusselt number in different cooling water flow. The temperature of cpu chip is monitored to determine the temperature is in the normal range of working temperature. The cooling water flow is in the range of 0.02L/s to 0.15L/s. It’s found that the increase of pin fins in the corner region effectively reduce the temperature of heat sink and cpu chip. The new type of pin fin arrays increase convection heat transfer coefficient and reduce heat resistance of heat sink.


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