Arbitrarily Configurable Optical Interconnect Fabric for Intrachip Global Communication

2003 ◽  
Author(s):  
Michael W. Haney ◽  
Muzammil Iqbal ◽  
Michael J. McFadden
Keyword(s):  
Integrated Circuit ◽  
Vlsi Design ◽  
Optical Interconnections ◽  
Optoelectronic Application ◽  
Integration Density ◽  
Device Integration ◽  
On Chip ◽  
Metal Interconnects ◽  
Application Specific ◽  
Interconnect Technology

Optical interconnections at the chip level may provide solutions to the limitations of metal interconnect technology, which is not keeping pace with the progress of device integration density. In this paper we undertake a quantitative analysis of on-chip metal interconnect performance as CMOS device technology scales into the nanometer regime. The results of this analysis motivates the use of optical interconnects as a replacement for global wires on the chip. We propose a new architecture, in which a 3-D optoelectronic Application Specific Interconnection Fabric (ASIF) is coupled to a conventional Silicon integrated circuit to alleviate the performance-limiting aspects of long metal interconnects. The overall goal of the ASIF concept is to overcome the limitations of conventional metal interconnects in a manner that can be seamlessly integrated according to current VLSI design constraints and practices.

scholarly journals A System-on-Chip Solution for a Low Power Active Capsule Endoscope with Therapeutic Capabilities for Clip Application in the Gastrointestinal Tract

2017 ◽  
Vol 02 (04) ◽  
pp. 1750005
Author(s):  
Oscar Alonso ◽  
Angel Diéguez ◽  
Sebastian Schostek ◽  
Marc O. Schurr
Keyword(s):  
Low Power ◽  
Integrated Circuit ◽  
System On Chip ◽  
Capsule Endoscope ◽  
Implementation Challenges ◽  
Clip Application ◽  
Application Specific Integrated Circuit ◽  
On Chip ◽  
Wireless Capsule ◽  
Application Specific

This paper addresses the circuit implementation challenges resulting from the integration of a therapeutic clip in a magnetically maneuverable wireless capsule intended for colonoscopy. To deal with the size constraints typical of a capsule endoscope, an Application Specific Integrated Circuit (ASIC) has been designed specifically to habilitate the release of the therapeutic clip. The ASIC is a complete System on Chip (SoC) that incorporates a circuit for the low power release of the clip, thus overcoming the limitations of the power supply system. With a size of 14[Formula: see text]mm2, the ASIC can be incorporated in practically any capsule endoscope, consuming only an idle-state power of 1.5[Formula: see text]mW.

Feasibility of the Microcomputers for the ADDASAT Capsule

2016 ◽  
Vol 841 ◽  
pp. 309-314
Author(s):  
Dragos Ronald Rugescu
Keyword(s):  
Integrated Circuit ◽  
System On Chip ◽  
Circuit Asic ◽  
Rf Communication ◽  
Size Constraints ◽  
Extreme Degree ◽  
The Future ◽  
Application Specific Integrated Circuit ◽  
On Chip ◽  
Application Specific

One of the most challenging problems in developing the astrionics of the recoverable orbital ADDAHORSE microcapsule is represented by the power and size constraints which require an extreme degree of miniaturization. The size, mass and power requirements of the electronic and computing (astrionics) on-board control and command equipment can be conveniently reduced by designing an Application Specific Integrated Circuit (ASIC) which integrates sensors, autopilot logic, drivers, RF communication and interface subsystems in a single, combined SoC (System-on-Chip). The feasibility of such a device is discussed here within the bounds of the ADDAHORSE project which was proposed for structural funding in Romania in 2014. This study was conducted by the Center for Innovation and Development in the Exploration of Space (CIDES) in the emerging Făgăraș facility of the future Făgăraș Space Center in Romania.

Integrated Circuit Device Repair Using FIB System: Tips, Tricks, and Strategies

1999 ◽  
Author(s):  
K. N. Hooghan ◽  
K. S. Wills ◽  
P.A. Rodriguez ◽  
S.J. O’Connell
Keyword(s):  
Integrated Circuit ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Dead Reckoning ◽  
Physical Damage ◽  
Art Form ◽  
Metal Levels ◽  
Potential Damage ◽  
On Chip ◽  
Beam Currents

Abstract Device repair using Focused Ion Beam(FIB) systems has been in use for most of the last decade. Most of this has been done by people who have been essentially self-taught. The result has been a long learning curve to become proficient in device repair. Since a great deal of the problem is that documentation on this “art form” is found in papers from many different disciplines, this work attempts to summarize all of the available information under one title. The primary focus of FIB device repair is to ensure and maintain device integrity and subsequently retain market share while optimizing the use of the instrument, usually referred to as ‘beam time’. We describe and discuss several methods of optimizing beam time. First, beam time should be minimized while doing on chip navigation to reach the target areas. Several different approaches are discussed: dead reckoning, 3-point alignment, CAD-based navigation, and optical overlay. Second, after the repair areas are located and identified, the desired metal levels must be reached using a combination of beam currents and gas chemistries, and then filled up and strapped to make final connections. Third, cuts and cleanups must be performed as required for the final repair. We will discuss typical values of the beam currents required to maintain device integrity while concurrently optimizing repair time. Maintaining device integrity is difficult because of two potentially serious interactions of the FIB on the substrate: 1) since the beam consists of heavy metal ions (typically Gallium) the act of imaging the surface produces some physical damage; 2) the beam is positively charged and puts some charge into the substrate, making it necessary to use great care working in and around capacitors or active areas such as transistors, in order to avoid changing the threshold voltage of the devices. Strategies for minimizing potential damage and maximizing quality and throughput will be discussed.

Efficient on-chip tunable selective switches for optical interconnections

2018 ◽  
Author(s):  
C.L. Manganelli ◽  
P. Velha ◽  
P. Pintus ◽  
F. Gambini ◽  
O. Lemonnier ◽  
...  
Keyword(s):  
Optical Interconnections ◽  
On Chip

scholarly journals Theoretical Analysis of Terahertz Dielectric–Loaded Graphene Waveguide

Nanomaterials ◽  
2021 ◽  
Vol 11 (1) ◽  
pp. 210
Author(s):  
Da Teng ◽  
Kai Wang
Keyword(s):  
Photonic Devices ◽  
Effective Index ◽  
The Finite Element Method ◽  
Index Method ◽  
Modal Properties ◽  
Terahertz Region ◽  
Effective Index Method ◽  
Integration Density ◽  
Device Integration ◽  
Potential Applications

The waveguiding of terahertz surface plasmons by a GaAs strip-loaded graphene waveguide is investigated based on the effective-index method and the finite element method. Modal properties of the effective mode index, modal loss, and cut-off characteristics of higher order modes are investigated. By modulating the Fermi level, the modal properties of the fundamental mode could be adjusted. The accuracy of the effective-index method is verified by a comparison between the analytical results and numerical simulations. Besides the modal properties, the crosstalk between the adjacent waveguides, which determines the device integration density, is studied. The findings show that the effective-index method is highly valid for analyzing dielectric-loaded graphene plasmon waveguides in the terahertz region and may have potential applications in subwavelength tunable integrated photonic devices.

scholarly journals Simultaneous Voltage and Current Measurement Instrumentation Amplifier for ECG and PPG Monitoring

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 679
Author(s):  
Jongpal Kim
Keyword(s):  
Integrated Circuit ◽  
Cardiovascular Health ◽  
Current Noise ◽  
Instrumentation Amplifier ◽  
Current Sensing ◽  
Application Specific Integrated Circuit ◽  
Time Division ◽  
Electrocardiogram Ecg ◽  
First Time ◽  
Application Specific

An instrumentation amplifier (IA) capable of sensing both voltage and current at the same time has been introduced and applied to electrocardiogram (ECG) and photoplethysmogram (PPG) measurements for cardiovascular health monitoring applications. The proposed IA can switch between the voltage and current sensing configurations in a time–division manner faster than the ECG and PPG bandwidths. The application-specific integrated circuit (ASIC) of the proposed circuit design was implemented using 180 nm CMOS fabrication technology. Input-referred voltage noise and current noise were measured as 3.9 µVrms and 172 pArms, respectively, and power consumption was measured as 34.9 µA. In the current sensing configuration, a current noise reduction technique is applied, which was confirmed to be a 25 times improvement over the previous version. Using a single IA, ECG and PPG can be monitored in the form of separated ECG and PPG signals. In addition, for the first time, a merged ECG/PPG signal is acquired, which has features of both ECG and PPG peaks.

Hybrid Wired/Wireless On-Chip Network Design for Application-Specific SoC

2012 ◽  
Vol E95-C (4) ◽  
pp. 495-505 ◽  
Author(s):  
Shouyi YIN ◽  
Yang HU ◽  
Zhen ZHANG ◽  
Leibo LIU ◽  
Shaojun WEI
Keyword(s):  
Network Design ◽  
On Chip ◽  
Application Specific

scholarly journals Topology Design of Digital Metamaterials for Ultra-Compact Integrated Photonic Devices Based on Mode Manipulation

2021 ◽  
Author(s):  
Han Ye ◽  
Yanrong Wang ◽  
Shuhe Zhang ◽  
Danshi Wang ◽  
Yumin Liu ◽  
...  
Keyword(s):  
Photonic Devices ◽  
Topology Design ◽  
Functional Region ◽  
Optical Interconnections ◽  
Silicon Waveguide ◽  
All Optical ◽  
On Chip ◽  
Mode Order

Precise manipulation of mode order in silicon waveguide plays a fundamental role in the on-chip all-optical interconnections and is still a tough task in design when the functional region is...

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