Failures in electronics subjected to shock and vibration are typically diagnosed using the built-in self test (BIST) or using continuity monitoring of daisy-chained packages. The BIST which is extensively used for diagnostics or identification of failure, is focused on reactive failure detection and provides limited insight into reliability and residual life. In this paper, a new technique has been developed for health monitoring and failure mode classification based on measured damage precursors. A feature extraction technique in the joint-time frequency domain has been developed along with pattern classifiers for fault diagnosis of electronics at product-level. The Karhunen Loe´ve transform (KLT) has been used for feature reduction and de-correlation of the feature vectors for fault mode classification in electronic assemblies. Euclidean, and Mahalanobis, and Bayesian distance classifiers based on joint-time frequency analysis, have been used for classification of the resulting feature space. Previously, the authors have developed damage pre-cursors based on time and spectral techniques for health monitoring of electronics without reliance on continuity data from daisy-chained packages. Statistical Pattern Recognition techniques based on wavelet packet energy decomposition [Lall 2006a] have been studied by authors for quantification of shock damage in electronic assemblies, and auto-regressive moving average, and time-frequency techniques have been investigated for system identification, condition monitoring, and fault detection and diagnosis in electronic systems [Lall 2008]. However, identification of specific failure modes was not possible. In this paper, various fault modes such as solder inter-connect failure, inter-connect missing, chip delamination chip cracking etc in various packaging architectures have been classified using clustering of feature vectors based on the KLT approach [Goumas 2002]. The KLT de-correlates the feature space and identifies dominant directions to describe the space, eliminating directions that encode little useful information about the features [Qian 1996, Schalkoff 1972, Theodoridis 1998, Tou 1974]. The clustered damage pre-cursors have been correlated with underlying damage. Several chip-scale packages have been studied, with leadfree second-level interconnects including SAC105, SAC305 alloys. Transient strain has been measured during the drop-event using digital image correlation and high-speed cameras operating at 100,000 fps. Continuity has been monitored simultaneously for failure identification. Fault-mode classification has been done using KLT and joint-time-frequency analysis of the experimental data. In addition, explicit finite element models have been developed and various kinds of failure modes have been simulated such as solder ball cracking, trace fracture, package falloff and solder ball failure. Models using cohesive elements present at the solder joint-copper pad interface at both the PCB and package side have also been created to study the traction-separation behavior of solder. Fault modes predicted by simulation based pre-cursors have been correlated with those from experimental data.
Modeling and Simulation of Shock and Drop Loading for Complex Portable Electronic Systems