Study on CAM System for Drilling in Printed Wiring Boards: Optimization of Stacking Sheet Considering Drill Processing Temperature

Author(s):  
Toshiki Hirogaki ◽  
Eiichi Aoyama ◽  
Keiji Ogawa ◽  
Tsuyoshi Okawa

Recently, printed wiring boards (PWBs), which are employed in electronic devices, have been miniaturized, lightened, and made multifunctional. This trend demands the improvement of drilling technology and a method to raise productivity. In this study, as a processing sample, we use the aramid fiber-reinforced printed wiring board (AFRP) of the next generation PWB, which is attracting attention, and GFRP, which is most commonly used. We investigate the processing temperature and the processing quality and conduct number optimization of the sheets to improve productivity by increasing their number.

1993 ◽  
Vol 115 (4) ◽  
pp. 366-372 ◽  
Author(s):  
G. G. Stefani ◽  
N. S. Goel ◽  
D. B. Jenks

Thermal modeling of Surface Mount Technology (SMT) microelectronics packages is difficult due to the complexity of the printed wiring board (PWB) plates through hole (PTH) structure. A simple, yet powerful finite difference based approach, called EPIC (Equivalent Parameter for Interfacial Cells), for modelling complex 2-D and 3-D geometries with multiple materials is used to model the PTH structure. A technique for computing an effective thermal conductivity for the PWB is presented. The results compare favorably with those from a commercially available finite element package but require far less computer time.


2013 ◽  
Vol 2013 (1) ◽  
pp. 000964-000969
Author(s):  
Bennion Cannon ◽  
Frank Friedl ◽  
Gary Gisler

This paper details the thermal evaluation of high-current polyimide rigid and rigid-flex printed wiring boards in a vacuum. Although industry standards, such as IPC-2152 or MIL-STD-275, can be used to determine required trace width for PWB traces that carry current to between 20 or 30 amps for multiple copper plane thicknesses, they typically cannot be used to determine trace width for PWB traces that handle current greater than 15 amps. This paper presents results from testing and analysis of high-current rigid and rigid-flex PWBS that must carry current of up to 60 amps. Testing was performed in vacuum on a controlled-temperature platen, measuring board temperature at specific locations to determine performance of different trace widths using 2 and 4 ounce copper layers. A thermal imaging camera was used to identify PWB hot spots. Test results were compared to IPC-2152 standards, extrapolated to 60 amps current.


Author(s):  
Manas Bajaj ◽  
Robert Fulton ◽  
Russell Peak

Technological advancements have made the product realization process assume multi-disciplinary proportions. The information models associated with a product have grown richer not only in content but also in semantics and though derived from diverse sources, they are interdependent and need to interact. This paper envisions customizing Product Realization Frameworks (PRFs) as a synergistic aggregation of rich information models that cater to product development. It proposes a semantic model to organize product realization information and then develops a “Three-Tier Architecture” to enable the customization of Product Realization Frameworks for individual business needs of engineering enterprises. A prototype PRF for an “Optimized printed wiring board (PWB) stack-up design” problem has been implemented using the concepts proposed. The paper points towards the inherent flexibility of the proposed architecture to cater to varied extensions of the stack-up design problem.


2004 ◽  
Vol 19 (11) ◽  
pp. 3214-3223 ◽  
Author(s):  
T.T. Mattila ◽  
V. Vuorinen ◽  
J.K. Kivilahti

When lead-free solder alloys mix with lead-free component and board metallizations during reflow soldering, the solder interconnections become multicomponent alloy systems whose microstructures cannot be predicted on the basis of the SnPb metallurgy. To better understand the influences of these microstructures on the reliability of lead-free electronics assemblies, SnAgCu-bumped components were reflow-soldered with near-eutectic SnAgCu solder pastes on Ni(P)|m.Au- and organic solderability preservative (OSP)-coated printed wiring boards and tested under cyclic thermal shock loading conditions. The reliability performance under thermomechanical loading was found to be controlled by the kinetics of recrystallization. Because ductile fracturing of the as-soldered tin-rich colonies would require a great amount of plastic work, the formation of continuous network of grain boundaries by recrystallization is needed for cracks to nucleate and propagate intergranularly through the solder interconnections. Detailed microstructural observations revealed that cracks nucleate and grow along the grain boundaries especially between the recrystallized part and the non-recrystallized part of the interconnections. The thermal cycling test data were analyzed statistically by combining the Weibull statistics and the analysis of variance. The interconnections on Ni(P)|m.Au were found out to be more reliable than those on Cu|m.OSP. This is due to the extensive dissolution of Cu conductor, in the case of the Cu|m.OSP assemblies, into molten solder that makes the microstructure to differ noticeably from that of the Ni(P)|m.Au interconnections. Because of large primary Cu6Sn5 particles, the Cu-enriched interconnections enhance the onset of recrystallization, and cracking of the interconnections is therefore faster. The solder paste composition had no statistically significant effect on the reliability performance.


2001 ◽  
Vol 702 ◽  
Author(s):  
Ernest L. Lawton ◽  
Frederick T. Wallenberger ◽  
Hong Li

ABSTRACTThe predominate substrate for multilayer printed wiring boards is laminate constructed from epoxy resin reinforced with fiber glass fabrics. This combination of materials dominates the segment of the electronics market where dimensional stability of the substrate is critical. The rapid development of high speed digital and analog electronic systems has challenged the predominance of fiber glass as the reinforcement of choice. As systems move to the GHz frequency range, there is a need for lower dielectric constant of the substrate to insure integrity and speed of signals. A lower dissipation factor of the substrate is desired for the wireless communication applications of printed wiring boards. A review is presented of materials competing as substrates for the high speed application of the printed wiring board market.


Author(s):  
William Borland ◽  
John J. Felten ◽  
Lynne E. Dellis ◽  
Saul Ferguson ◽  
Diptarka Majumdar ◽  
...  

Combining thick-film and printed wiring board processes allows thick-film ceramic resistors and capacitors to be embedded in printed wiring boards (PWB). The resistor materials are based on lanthanum boride and cover the range of 10 ohm/square to 10 Kohm/square resistivities. The capacitor material is based on doped barium titanate. Both systems are designed to be “thick-film” printed on copper foil in the locations desired in the circuit and the foil is then fired in nitrogen at 900°C to form the ceramic component on the copper foil. The foil is then laminated, component face down, to FR4 using standard prepreg. The inner layer is then etched to reveal the components in a FR4 matrix. The resistors can be trimmed to tight tolerance at this stage and the components tested. The inner layer can then be laminated into a multilayer PWB. The process is described and the influence of board design, PWB processing and materials are presented and discussed. Examples of circuits using embedded thick-film passives are shown and results of reliability studies are presented.


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