Solid-State Microjoining Mechanisms of Wire Bonding and Flip Chip Bonding

2017 ◽  
Vol 139 (4) ◽  
Author(s):  
Yasuo Takahashi ◽  
Hiroki Fukuda ◽  
Yasuhiro Yoneshima ◽  
Hideki Kitamura ◽  
Masakatsu Maeda

Low-temperature microjoining, such as wire (or ribbon) bonding, tape automated bonding (TAB), and flip chip bonding (FCB), is necessary for electronics packaging. Each type of microjoining takes on various aspects but has common bonding mechanisms regarding friction slip, plastic deformation, and friction heating. In the present paper, solid-state microjoining mechanisms in Au wire (ball) bonding, FCB, Al wire bonding (WB), and Al ribbon bonding are discussed to systematically understand the common bonding mechanisms. Ultrasonic vibration enhances friction slip and plastic deformation, making it possible to rapidly obtain dry interconnects. Metallic adhesion at the central area of the bonding interface is mainly produced by the friction slip. On the other hand, the folding of the lateral side surfaces of the Au bump, Au ball, and Al wire is very important for increasing the bonded area. The central and peripheral adhesions are achieved by a slip-and-fold mechanism. The solid-state microjoining mechanisms of WB and FCB are discussed based on experimental results.

2015 ◽  
Vol 2015 (1) ◽  
pp. 000406-000412 ◽  
Author(s):  
Ivy Qin ◽  
Aashish Shah ◽  
Hui Xu ◽  
Bob Chylak ◽  
Nelson Wong

With all the advances in 2.5D and 3D packaging, wire bonding is still the most popular interconnect technology and the workhorse of the industry. Wire bonding technology has been the lower cost solution comparing to flip chip. Wire bonding package cost is much reduced with the introduction of Copper wire bonding. Technology development and innovation in wire bonding provides new packaging solutions that improves performance and reduces cost. This paper reviews the recent innovations in ball bonding technology to provide optimized ball bonding solutions targeted for different bonding wire material. It examines the different challenges for the alternative wire types including Cu wire, Pd coated, and AuPd coated Cu wire and Ag Alloy wire. We will discuss key development in ball bonding equipment, process and material to overcome the challenges and provide robust low cost solutions. The advantages of each wire type are outlined, and guidelines to select the right bonding wire type per application requirements are provided.


2010 ◽  
Vol 2010 (1) ◽  
pp. 000667-000674 ◽  
Author(s):  
Chunyan Nan ◽  
Michael Mayer ◽  
Y. Norman Zhou ◽  
Jairus L. Pisigan ◽  
John Persic ◽  
...  

In this study, security bumps are used for strengthening the stitch bonds of two 20 micron diameter insulated Au wire bonding example processes. Bump bonding as a variant of the ball bonding process has been commonly used in the microelectronic industry to make bumps on dies that will later be flip-chip bonded. The optimized stitch bond parameters combined with the security bumps placed upon the stitch bonds substantially improve the second bond strength demonstrated on the two example processes on two different types of wire bonding equipment. A comparison of pull test results shows that security bumps increase stitch pull force up to 100%. The effect of varying the relative position (shift) of the security bump relative to the stitch bond location is investigated for one process. The window with the highest pull force improvement is ranging from 16 to 31 micron shift towards the ball bond. Looping with insulated wire is faster than with bare wire because of less effort to mitigate the risks of wires touching each other and producing a short. If two wire loops touch each other e.g. after molding, the wire insulation prevents shorts. Therefore, the looping requirements of the example processes with security bumps can be relaxed by reducing the number of kinks (reverses) from four to two. Due to the reduced looping complexity, the overall UPH increased with insulated wire by about 3.0 % and 4.9 % for the two processes, respectively. This increase is in spite of the time required for the additional security bumps, and compared to bare wire processes without security bumps but with more complex looping.


1971 ◽  
Vol 20 (212) ◽  
pp. 606-609 ◽  
Author(s):  
Kiyohisa IMADA ◽  
Tuneo YAMAMOTO ◽  
Kenji KANEKIYO ◽  
Motowo TAKAYANAGI

2020 ◽  
Vol 0 (4) ◽  
pp. 43-51
Author(s):  
A. L. Vorontsov ◽  
◽  
I. A. Nikiforov ◽  

Formulae have been obtained that are necessary to calculate cumulative deformation in the process of straitened extrusion in the central area closed to the working end of the counterpunch. The general method of plastic flow proposed by A. L. Vorontsov was used. The obtained formulae allow one to determine the deformed state of a billet in any point of the given area. The formulae should be used to take into account the strengthening of the extruded material.


2021 ◽  
Vol 11 (15) ◽  
pp. 7057
Author(s):  
Lin Wang ◽  
Zhe Cheng ◽  
Zhi-Guo Yu ◽  
De-Feng Lin ◽  
Zhe Liu ◽  
...  

Half-bridge modules with integrated GaN high electron mobility transistors (HEMTs) and driver dies were designed and fabricated in this research. Our design uses flip-chip technology for fabrication, instead of more generally applied wire bonding, to reduce parasitic inductance in both the driver-gate and drain-source loops. Modules were prepared using both methods and the double-pulse test was applied to evaluate and compare their switching characteristics. The gate voltage (Vgs) waveform of the flip-chip module showed no overshoot during the turn-on period, and a small oscillation during the turn-off period. The probabilities of gate damage and false turn-on were greatly reduced. The inductance in the drain-source loop of the module was measured to be 3.4 nH. The rise and fall times of the drain voltage (Vds) were 12.9 and 5.8 ns, respectively, with an overshoot of only 4.8 V during the turn-off period under Vdc = 100 V. These results indicate that the use of flip-chip technology along with the integration of GaN HEMTs with driver dies can effectively reduce the parasitic inductance and improve the switching performance of GaN half-bridge modules compared to wire bonding.


2002 ◽  
Author(s):  
Ronald E. Reedy ◽  
Hal Anthony ◽  
Charles Kuznia ◽  
Mike Pendelton ◽  
Jim Cable ◽  
...  

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