Advanced Methodologies for Developing Improved Potted Smart Munitions for High-G Applications

2013 ◽  
Vol 135 (3) ◽  
Author(s):  
Nien-Hua Chao ◽  
John A. Dispenza ◽  
Mario DeAngelis

Potted electronics are becoming more common in precision-guided smart munitions designs due to the requirements for miniaturization and structural-robustness. In most of these applications, the potted electronics are inactive for most of their lifetime and may be stored without environmental (temperature and humidity) controls for up to 20 yr. The uncontrolled environment for smart munitions however makes the thermal management task especially difficult due to the coefficient of thermal expansion (CTE) mismatch that can exist between the potting material and the electronic components. In this paper, we will do the following: (1) present a methodology being developed for reducing the thermal stresses to the potted electronics used in uncontrolled environments by encapsulating the circuit board assembly (CBA) with a thin polymer layer which has been precisely formed to conform to the imprecisely shaped, as-populated, CBA. The protective polymer layer will be both flexible and soft enough to protect the CBA components from damage caused by thermal expansion mismatches, but not degrade the structural support that the potting provides during high-g force projectile launches, (2) discuss how the protective polymer layer methodology can also be used to lessen in-circuit board crosstalk, improve shielding from external RF interference, control tin-whisker growth, and enhance moisture barrier properties and thermal management for CBAs, and (3) demonstrate how to improve the smart munitions survivability under extreme high-g applications through the use of syntactic foams and material characterization before and after accelerated temperature-cycling and thermal-aging tests.

Author(s):  
Nien-Hua Chao ◽  
John A. Dispenza ◽  
Mario E. DeAngelis

Potted electronics are becoming more common in precision-guided artillery-launched munitions and also missile systems due to the requirements for miniaturization and structural-robustness. In this paper we have presented a methodology for encapsulating circuit board assemblies (CBA) with a thin polymer layer. The protective polymer layer is both flexible and soft enough to protect the CBA from damage caused by CTE mismatches, and without any appreciable degradation in the structural support during the high-g forces of projectile launch. The application process described here allows for the use of a broad range of polymer materials including those that may not be formed directly against an actual CBA. Proof-of-concept experimental tests and finite-element simulations have been performed and the tests and simulation results are shared in this paper. In addition, the protective polymer layer can also be used to improve in-circuit board crosstalk and RF interference shielding, tin-whisker growth control, moisture barrier properties, and thermal management for un-potted and potted CBAs.


Author(s):  
William J. Cunningham ◽  
Dick Casali ◽  
Norman J. Armendariz

Abstract The SEMATECH/SEMI roadmap forecasts increased density requirements for printed circuit board manufacturing to accommodate smaller form factor interconnects, increased pin counts, and routing densities on a range of PCB sizes and thicknesses. As a result, the effect of materials. thermal expansion properties may further impact the structural or physical integrity and subsequent electrical properties for high speed and thermal management requirements. This study demonstrated that various sample coupons selected from PCB boards with different amounts of copper showed a corresponding coefficient of thermal expansion (CTE) correlation in the Z-axis (CTEZ) and can be modeled using a constitutive equation. Moreover, samples were further evaluated from the effect of increasing temperature and showed that the CTE indeed affects copper-interconnect physical structures such as copper vias and barrels in terms of elongation or strain.


1990 ◽  
Vol 216 ◽  
Author(s):  
J. Malamas ◽  
R.P. Bambha ◽  
J.B. Ramsey ◽  
W.C. Garrett ◽  
E.G. Kelso ◽  
...  

ABSTRACTWe report the investigation of an interconnect circuit board (ICB) with anisotropic thermal expansion for use with bump bonded, indirect hybrid, scanning focal plane arrays. This ICB is designed to reduce significantly the thermal stresses on the indium bump bonds during thermal cycling. Highly oriented pyrolitic graphite (HOPG) was chosen because its anisotropic thermal expansion meets the criteria for forming an indirect hybrid ICB using silicon processor circuits and mecury cadmium telluride detectors. Properties of HOPG influencing its performance as an ICB have been investigated including thermal expansion, electrical conductivity, durability, and adherence of electrically insulating thin films.


Author(s):  
Fuat Okumus ◽  
Aydin Turgut ◽  
Erol Sancaktar

Abstract In this study, the use of coating layers is investigated to reduce thermal stresses in the metal matrix composites which have a mismatch in coefficients of thermal expansions in fiber and matrix components. The thermoelastic solutions are obtained based on a three-cylinder model. It is shown that the effectiveness of the layer can be defined by the product of its coefficient of thermal expansion and thickness. Consequently, a compensating layer with a sufficiently high coefficient of thermal expansion can reduce the thermal stresses in the metal matrix. The study is based on a concentric three cylinder model isolating individual steel fibers surrounded with a coating layer and an aluminum matrix layer. Only monotonic cooling is studied.


1962 ◽  
Vol 29 (1) ◽  
pp. 151-158 ◽  
Author(s):  
A. Mendelson ◽  
S. W. Spero

A general method is presented for obtaining the elastoplastic stress and strain distributions in a thermally stressed plate of a strain-hardening material with temperature-varying modulus, yield point, and coefficient of thermal expansion. It is shown that for linear strain-hardening the solution can often be obtained in closed form. It is indicated that the error due to neglecting strain-hardening may sometimes be appreciable. The assumption that the total strain remains the same as that computed elastically (strain invariance) often leads to smaller errors than the neglect of strain-hardening.


1991 ◽  
Vol 113 (2) ◽  
pp. 138-148 ◽  
Author(s):  
J. Lau ◽  
R. Subrahmanyan ◽  
D. Rice ◽  
S. Erasmus ◽  
C. Li

Thermal stresses and strains in the solder joints and plated-through-hole (PTH) copper pads/barrels of a pin-grid array (PGA) assembly under thermal cycling conditions have been determined in the present study. There are two major systems of thermal stresses/strains acting at the solder joint and copper. One is the transverse shear and vertical normal stress/strain due to the local thermal expansion mismatch between the pin, solder, copper, and FR-4. The other is the horizontal normal stress/strain due to the global thermal expansion mismatch between the ceramic PGA and the FR-4 printed circuit board (PCB). The effects of the local thermal expansion mismatch on the reliability of solder joint and PTH copper have been determined using a 3-D orthotropic-elastoplastic finite element method. The effects of the global thermal expansion mismatch on the reliability of solder joint and PTH copper have been determined by fatigue experiments. Fatigue life of the solder joint and PTH copper was then estimated based on the calculated strains and the fatigue data on solders and coppers.


1982 ◽  
Vol 1 (1) ◽  
pp. 38-43 ◽  
Author(s):  
D. Fishman ◽  
N. Cooper

It is reasoned that wide penetration of chip carriers into equipment for professional and commercial applications depends on developing methods for mounting the leadless types directly on to conventional polymer type printed circuit boards. The main problem to be overcome is fatigue failure of the solder joints due to the mismatch in thermal expansion, evidenced by poor thermal cycling performance. In this paper the thermal cycling performance is compared when four sizes of ceramic leadless chip carrier are mounted on a selection of printed circuit board materials ranging from the conventional to those specially formulated, either on the basis of matching the coefficient of thermal expansion of the chip carrier material, or to provide a layer of compliant elastomer material underneath the layer bearing the copper contact layer, so that strain due to thermal expansion mismatch is not transmitted to the solder layer. Over 400 thermal cycles (−55 to + 125°C) were recorded using proprietary versions of elastomer coated substrates. For appropriate applications the basis is thus laid for an economic and technically acceptable solution. The practical implications of two methods of soldering—wave (jet) and vapour phase—are also discussed.


2015 ◽  
Vol 825-826 ◽  
pp. 297-304 ◽  
Author(s):  
Martin Seiss ◽  
Tobias Mrotzek ◽  
Norbert Dreer ◽  
Wolfram Knabl

The key properties of materials used for thermal management in electronics are thermal conductivity and the coefficient of thermal expansion. These properties can be tailored by stacking molybdenum and copper layers. Here, molybdenum copper multilayer composites with varying copper content, from 63 to 88 wt%, have been investigated. It is demonstrated, that thermal conductivity and coefficient of thermal expansion, can be adjusted by the copper content. Two flash methods for measuring the thermal conductivity are compared and the validity of the results is discussed since measurements on thin materials with strong anisotropy require a certain setup of the measurement device. For the studied compositions the thermal conductivity was determined to be between 220 to 270 W/m/K and the coefficient of thermal expansion between 6.1 to 11.5 ppm/K.


2008 ◽  
Vol 59 ◽  
pp. 169-172 ◽  
Author(s):  
Thomas Schubert ◽  
T. Weißgärber ◽  
Bernd Kieback

The ideal thermal management material working as heat sink and heat spreader should have a high thermal conductivity combined with a reduced and tailorable thermal expansion. To meet these market demands copper composites reinforced with diamond particles were fabricated by a powder metallurgical method (powder mixing with subsequent pressure assisted consolidation). In order to design the interfacial behaviour between copper and the reinforcement different alloying elements, chromium or boron, were added to the copper matrix. The produced composites exhibit a thermal conductivity up to 700 W/mK combined with a coefficient of thermal expansion (CTE) of 7-8 x 10-6/K. The copper composites with good interfacial bonding show only small decrease in thermal conductivity and a relatively stable CTE after the thermal cycling test.


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