Micro-Patterning of Silicon by Frictional Interaction and Chemical Reaction

1998 ◽  
Vol 120 (2) ◽  
pp. 353-357 ◽  
Author(s):  
Dae-Eun Kim ◽  
Jae-Joon Yi

In this paper a novel and economical method of generating three-dimensional micro-patterns on single crystal silicon without the need for a mask is presented. The technique is based on the fundamental understanding of frictional interaction at light loads. Micro-patterning is done through a two-step process that comprises mechanical scribing and chemical etching. The basic idea is to induce micro-plastic deformation along a prescribed track through frictional interaction between the tool and the workpiece. Then, by exposing the surface to a chemical under controlled conditions, preferential chemical reaction is induced along the track to form hillocks about 5 μm wide and 1 μm high. This method of micro-machining may be used for making patterns in micro-electro-mechanical systems (MEMS) at low cost. Furthermore, this process demonstrates how microtribological processes can be utilized in the fabrication of micro-structures.

Sensor Review ◽  
2015 ◽  
Vol 35 (2) ◽  
pp. 157-167 ◽  
Author(s):  
Shengbo Sang ◽  
Ruiyong Zhai ◽  
Wendong Zhang ◽  
Qirui Sun ◽  
Zhaoying Zhou

Purpose – This study aims to design a new low-cost localization platform for estimating the location and orientation of a pedestrian in a building. The micro-electro-mechanical systems (MEMS) sensor error compensation and the algorithm were improved to realize the localization and altitude accuracy. Design/methodology/approach – The platform hardware was designed with common low-performance and inexpensive MEMS sensors, and with a barometric altimeter employed to augment altitude measurement. The inertial navigation system (INS) – extended Kalman filter (EKF) – zero-velocity updating (ZUPT) (INS-EKF-ZUPT [IEZ])-extended methods and pedestrian dead reckoning (PDR) (IEZ + PDR) algorithm were modified and improved with altitude determined by acceleration integration height and pressure altitude. The “AND” logic with acceleration and angular rate data were presented to update the stance phases. Findings – The new platform was tested in real three-dimensional (3D) in-building scenarios, achieved with position errors below 0.5 m for 50-m-long route in corridor and below 0.1 m on stairs. The algorithm is robust enough for both the walking motion and the fast dynamic motion. Originality/value – The paper presents a new self-developed, integrated platform. The IEZ-extended methods, the modified PDR (IEZ + PDR) algorithm and “AND” logic with acceleration and angular rate data can improve the high localization and altitude accuracy. It is a great support for the increasing 3D location demand in indoor cases for universal application with ordinary sensors.


1987 ◽  
Vol 65 (8) ◽  
pp. 892-896 ◽  
Author(s):  
R. E. Thomas ◽  
C. E. Norman ◽  
S. Varma ◽  
G. Schwartz ◽  
E. M. Absi

A low-cost, high-yield technology for producing single-crystal silicon solar cells at high volumes, and suitable for export to developing countries, is described. The process begins with 100 mm diameter as-sawn single-crystal p-type wafers with one primary flat. Processing steps include etching and surface texturization, gaseous-source diffusion, plasma etching, and contacting via screen printing. The necessary adaptations of such standard processes as diffusion and plasma etching to solar-cell production are detailed. New process developments include a high-throughput surface-texturization technique, and automatic printing and firing of cell contacts.The technology, coupled with automated equipment developed specifically for the purpose, results in solar cells with an average efficiency greater than 12%, a yield exceeding 95%, a tight statistical spread on parameters, and a wide tolerance to starting substrates (including the first 100 mm diameter wafers made in Canada). It is shown that with minor modifications, the present single shift 500 kWp (kilowatt peak) per year capacity technology can be readily expanded to 1 MWp per year, adapted to square and polycrystalline substrates, and efficiencies increased above 13%.


1997 ◽  
Vol 490 ◽  
Author(s):  
Myung-Sik Son ◽  
Ho-Jung Hwang

ABSTRACTAn alternative three-dimensional (3D) Monte Carlo (MC) dynamic simulation model for phosphorus implant into (100) single-crystal silicon has been developed which incorporates the effects of channeling and damage. This model calculates the trajectories of both implanted ions and recoiled silicons and concurrently and explicitly affects both ions and recoils due to the presence of accumulative damage. In addition, the model for room-temperature implant accounts for the self-annealing effect using our defined recombination probabilities for vacancies and interstitials saved on the unit volumes. Our model has been verified by the comparison with the previously published SIMS data over commonly used energy range between 10 and 180 keV, using our proposed empirical electronic energy loss model. The 3D formations of the amorphous region and the ultra-shallow junction around the implanted region could be predicted by using our model, TRICSI (TRansport Ions into Crystal-Silicon).


2017 ◽  
Vol 2017 (1) ◽  
pp. 000208-000214 ◽  
Author(s):  
Junjun Huan ◽  
Vamsy P. Chodavarapu ◽  
George Xereas ◽  
Charles Allan

Abstract The Global Positioning System (GPS) is the primary means of Positioning, Navigation, and Timing (PNT) for most civilian and military systems and applications. The rapid growth in autonomous systems has created a widespread interest in self-contained Inertial Navigation System (INS) for precise navigation and guidance in the absence of GPS. The microscale PNT systems need both specialized and low cost fabrication technologies to cost effectively bring these technologies to market. We describe an ultra-clean (low leak rate) wafer-level vacuum encapsulation microfabrication process of Micro-Electro-Mechanical Systems (MEMS) based sensors and devices. Using this process we have fabricated inertial sensors, frequency reference resonators, and pressure sensors. In addition to providing excellent resistance to shock and vibration, this combined microfabrication and packaging method would allow the use of high volume low cost plastic packaging at the device level. The microfabrication process is an 8” wafer process based on high aspect ratio bulk micromachining of a 30 μm thick single-crystal silicon device layer that is vacuum encapsulated at 10 mTorr between two silicon wafers with the demonstrated leak rate of only 6.5 × 10−18 atm cm3/s.


2013 ◽  
Vol 762 ◽  
pp. 763-768
Author(s):  
Zhi Qing Hu ◽  
Ji Zhao ◽  
Zeng Ming Feng

Micro-structured surfaces with drag reduction, desorption, and excellent optical performance are widely used in the field of automotive, aerospace, marine applications. Therefore, the manufacturing of the micro-structure on the metal surface is of high impotance. Although the processing methods for micro-patterning of surfaces have progressed in recent years, micro-structure processing is still not used on large metal surfaces. In this paper, a method of roll forming micro-structure on the plate surface is proposed. A simulation model for micro-structure roll forming (MRF) was presented by using three-dimensional finite element method (FEM). The strain and stress, and the displacements caused by micro-structure were analyzed. The results provide theoretical guidance for the design of different micro-structures and the sequence of their processing.


1994 ◽  
Vol 116 (1) ◽  
pp. 25-27
Author(s):  
C. Fredric ◽  
D. Tarrant ◽  
C. Jensen ◽  
J. Hummel ◽  
J. Ermer

Recent advances in the efficiency and manufacturing technology of CuInSe2 (CIS) thin films demonstrate the opportunity for low-cost large-scale production of photovoltaics for utility applications. Large area (0.4 m2) submodules with 9.7 percent aperture efficiencies yielding 37.8 watts have been fabricated. Thin film fabrication techniques used in the production of modules enable reduced production costs compared with those for single crystal silicon. The performance of 0.4 m2 modules is projected to exceed 50 watts, based on performance achieved to date on 0.1 m2 modules and small area test devices. Preliminary tests packaged (encapsulated and framed) modules show no significant losses after 15 1/2 months of continuous outdoor exposure. Fabrication of 0.4 m2 modules to demonstrate the feasibility of large-scale commercialization of CIS thin film photovoltaics for utility applications is currently under way.


2012 ◽  
Vol 426 ◽  
pp. 20-23
Author(s):  
Xiang Cheng ◽  
Xi Zhang ◽  
J.Y. Liu ◽  
X.H. Yang ◽  
Z.Q. Tian

Hard and brittle materials such as WC, SiC, and single crystal silicon or germanium are widely used in die/moulds for very high accuracy glass products, medical devices, and sensors for MEMS. Mechanical ductile-mode micro/nano milling is an effective method to create three dimensional geometries on these materials. One of the key factors affecting successfully ductile-mode machining is micro tooling. Due to limitations of commercially available micro tools, custom micro tooling is brought forward to give an active solution to this issue. This paper is a further study on custom micro tooling by the author, and several aspects associated with custom micro tooling have been discussed. Experimental results show the feasibility and effectiveness of the successful ductile-mode machining of hard and brittle materials by custom micro tooling. At last, this paper summarizes the techniques associated with custom micro tooling and point out the key aspects for further research on custom micro tooling.


2007 ◽  
Vol 2007 ◽  
pp. 1-9 ◽  
Author(s):  
Evan Franklin ◽  
Vernie Everett ◽  
Andrew Blakers ◽  
Klaus Weber

Sliver cells are thin, single-crystal silicon solar cells fabricated using standard fabrication technology. Sliver modules, composed of several thousand individual Sliver cells, can be efficient, low-cost, bifacial, transparent, flexible, shadow tolerant, and lightweight. Compared with current PV technology, mature Sliver technology will need 10% of the pure silicon and fewer than 5% of the wafer starts per MW of factory output. This paper deals with two distinct challenges related to Sliver cell and Sliver module production: providing a mature and robust Sliver cell fabrication method which produces a high yield of highly efficient Sliver cells, and which is suitable for transfer to industry; and, handling, electrically interconnecting, and encapsulating billions of sliver cells at low cost. Sliver cells with efficiencies of 20% have been fabricated at ANU using a reliable, optimised processing sequence, while low-cost encapsulation methods have been demonstrated using a submodule technique.


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