High Performance Dual Metal Gate CMOS with High Mobility and Low Threshold Voltage Applicable to Bulk CMOS Technology

Author(s):  
S. Yamaguchi ◽  
K. Tai ◽  
T. Hirano ◽  
T. Ando ◽  
S. Hiyama ◽  
...  
2001 ◽  
Vol 670 ◽  
Author(s):  
Igor Polishchuk ◽  
Pushkar Ranade ◽  
Tsu-Jae King ◽  
Chenming Hu

ABSTRACTIn this paper we propose a new metal-gate CMOS technology that uses a combination of two metals to achieve a low threshold voltage for both n- and p-MOSFET's. One of the gate electrodes is formed by metal interdiffusion so that no metal has to be etched away from the gate dielectric surface. Consequently, this process does not compromise the integrity and electrical reliability of the gate dielectric. This new technology is demonstrated for the Ti-Ni metal combination that produces gate electrodes with 3.9 eV and 5.3 eV work functions for n-MOS and p-MOS devices respectively.


Author(s):  
B. Doris ◽  
Y.H. Kim ◽  
B.P. Linder ◽  
M. Steen ◽  
V. Narayanan ◽  
...  

2009 ◽  
Vol 53 (3) ◽  
pp. 256-265 ◽  
Author(s):  
Rathnamala Rao ◽  
Guruprasad Katti ◽  
Dnyanesh S. Havaldar ◽  
Nandita DasGupta ◽  
Amitava DasGupta

2005 ◽  
Vol 52 (6) ◽  
pp. 1172-1179 ◽  
Author(s):  
T.-L. Li ◽  
C.-H. Hu ◽  
W.-L. Ho ◽  
H.C.-H. Wang ◽  
C.-Y. Chang

Sign in / Sign up

Export Citation Format

Share Document