3-Disjoint Paths Fault-tolerant Omega Multi-stage Interconnection Network with Reachable Sets and Coloring Scheme

Author(s):  
Ravi Rastogi ◽  
Nitin ◽  
Durg Singh Chauhan
2019 ◽  
Vol 30 (08) ◽  
pp. 1301-1315 ◽  
Author(s):  
Liqiong Xu ◽  
Shuming Zhou ◽  
Weihua Yang

An interconnection network is usually modeled as a graph, in which vertices and edges correspond to processors and communication links, respectively. Connectivity is an important metric for fault tolerance of interconnection networks. A graph [Formula: see text] is said to be maximally local-connected if each pair of vertices [Formula: see text] and [Formula: see text] are connected by [Formula: see text] vertex-disjoint paths. In this paper, we show that Cayley graphs generated by [Formula: see text]([Formula: see text]) transpositions are [Formula: see text]-fault-tolerant maximally local-connected and are also [Formula: see text]-fault-tolerant one-to-many maximally local-connected if their corresponding transposition generating graphs have a triangle, [Formula: see text]-fault-tolerant one-to-many maximally local-connected if their corresponding transposition generating graphs have no triangles. Furthermore, under the restricted condition that each vertex has at least two fault-free adjacent vertices, Cayley graphs generated by [Formula: see text]([Formula: see text]) transpositions are [Formula: see text]-fault-tolerant maximally local-connected if their corresponding transposition generating graphs have no triangles.


2017 ◽  
Vol 17 (02) ◽  
pp. 1750005 ◽  
Author(s):  
GAURAV KHANNA ◽  
RAJESH MISHRA ◽  
S. K. CHATURVEDI

Advancement in technology has resulted in increased computing power with the use of multiple processors within a system. These multiple processors need to communicate with each other and with memory modules. Multistage Interconnection Networks (MINs) provide a communication medium in such multi-processor systems by interconnecting a number of processors and memory modules. Besides, MINs also provide a cost effective substitute to costly crossbars in parallel computers and switching systems in telephone industry. This paper introduces two new fault-tolerant MINs named as Shuffle Exchange Gamma Interconnection Networks (SEGIN-1 and SEGIN-2). SEGIN-1 and SEGIN-2 can be obtained by altering Shuffle Exchange Network with one extra stage (SEN+) and provide two disjoint paths similar to it. Performance of SEGIN-1 and SEGIN-2 has been evaluated in terms of alternative paths, disjoint paths, reliability and hardware cost, and is compared with some very famous MINs like Shuffle Exchange Network (SEN), Shuffle Exchange Network with one extra stage (SEN+), Shuffle Exchange Network with two extra stage (SEN+2), Extra Stage Cube (ESC) and Gamma Interconnection Network (GIN). Results suggest that SEGINs surpass all the compared networks; hence, the proposed designs seem to be suitable for implementing practical interconnection networks.


2011 ◽  
Vol 22 (05) ◽  
pp. 1001-1018 ◽  
Author(s):  
YAMIN LI ◽  
SHIETUNG PENG ◽  
WANMING CHU

The recursive dual-net is a newly proposed interconnection network for massive parallel computers. The recursive dual-net is based on recursive dual-construction of a symmetric base network. A k-level dual-construction for k > 0 creates a network containing (2n0)2k/2 nodes with node-degree d0 + k, where n0 and d0 are the number of nodes and the node-degree of the base network, respectively. The recursive dual-net is node and edge symmetric and can contain huge number of nodes with small node-degree and short diameter. Disjoint-paths routing and fault-tolerant routing are fundamental and critical issues for the performance of an interconnection network. In this paper, we propose efficient algorithms for disjoint-paths and fault-tolerant routings on the recursive dual-net.


2020 ◽  
Vol 30 (03) ◽  
pp. 2040001
Author(s):  
Liyang Zhai ◽  
Liqiong Xu ◽  
Weihua Yang

An interconnection network is usually modeled as a graph, in which vertices and edges correspond to processors and communication links, respectively. Connectivity is an important metric for fault tolerance of interconnection networks. A connected graph [Formula: see text] is said to be maximally local-edge-connected if each pair of vertices [Formula: see text] and [Formula: see text] of [Formula: see text] are connected by [Formula: see text] pairwise edge-disjoint paths. In this paper, we show that the [Formula: see text]-dimensional augmented cube [Formula: see text] is [Formula: see text]-edge-fault-tolerant maximally local-edge-connected and the bound [Formula: see text] is sharp; under the restricted condition that each vertex has at least three fault-free adjacent vertices, [Formula: see text] is [Formula: see text]-edge-fault-tolerant maximally local-edge-connected and the bound [Formula: see text] is sharp; and under the restricted condition that each vertex has at least [Formula: see text] fault-free adjacent vertices, [Formula: see text] is [Formula: see text]-edge-fault-tolerant maximally local-edge-connected. Furthermore, we show that a [Formula: see text]-regular graph [Formula: see text] is [Formula: see text]-fault-tolerant one-to-many maximally local-connected if [Formula: see text] does not contain [Formula: see text] and is super [Formula: see text]-vertex-connected of order 1, a [Formula: see text]-regular graph [Formula: see text] is [Formula: see text]-fault-tolerant one-to-many maximally local-connected if [Formula: see text] does not contain [Formula: see text] and is super [Formula: see text]-vertex-connected of order 1.


2021 ◽  
Author(s):  
Karthik K ◽  
Sudarson Jena ◽  
Venu Gopal T

Abstract A Multiprocessor is a system with at least two processing units sharing access to memory. The principle goal of utilizing a multiprocessor is to process the undertakings all the while and support the system’s performance. An Interconnection Network interfaces the various handling units and enormously impacts the exhibition of the whole framework. Interconnection Networks, also known as Multi-stage Interconnection Networks, are node-to-node links in which each node may be a single processor or a group of processors. These links transfer information from one processor to the next or from the processor to the memory, allowing the task to be isolated and measured equally. Hypercube systems are a kind of system geography used to interconnect various processors with memory modules and precisely course the information. Hypercube systems comprise of 2n nodes. Any Hypercube can be thought of as a graph with nodes and edges, where a node represents a processing unit and an edge represents a connection between the processors to transmit. Degree, Speed, Node coverage, Connectivity, Diameter, Reliability, Packet loss, Network cost, and so on are some of the different system scales that can be used to measure the performance of Interconnection Networks. A portion of the variations of Hypercube Interconnection Networks include Hypercube Network, Folded Hypercube Network, Multiple Reduced Hypercube Network, Multiply Twisted Cube, Recursive Circulant, Exchanged Crossed Cube Network, Half Hypercube Network, and so forth. This work assesses the performing capability of different variations of Hypercube Interconnection Networks. A group of properties is recognized and a weight metric is structured utilizing the distinguished properties to assess the performance exhibition. Utilizing this weight metric, the performance of considered variations of Hypercube Interconnection Networks is evaluated and summed up to recognize the effective variant. A compact survey of a portion of the variations of Hypercube systems, geographies, execution measurements, and assessment of the presentation are examined in this paper. Degree and Diameter are considered to ascertain the Network cost. On the off chance that Network Cost is considered as the measurement to assess the exhibition, Multiple Reduced Hypercube stands ideal with its lower cost. Notwithstanding it, on the off chance that we think about some other properties/ scales/metrics to assess the performance, any variant other than MRH may show considerably more ideal execution. The considered properties probably won't be ideally adequate to assess the effective performance of Hypercube variations in all respects. On the off chance that a sensibly decent number of properties are utilized to assess the presentation, a proficient variation of Hypercube Interconnection Network can be distinguished for a wide scope of uses. This is the inspiration to do this research work.


Mathematics ◽  
2019 ◽  
Vol 7 (11) ◽  
pp. 1066
Author(s):  
Huifeng Zhang ◽  
Xirong Xu ◽  
Qiang Zhang ◽  
Yuansheng Yang

It is known widely that an interconnection network can be denoted by a graph G = ( V , E ) , where V denotes the vertex set and E denotes the edge set. Investigating structures of G is necessary to design a suitable topological structure of interconnection network. One of the critical issues in evaluating an interconnection network is graph embedding, which concerns whether a host graph contains a guest graph as its subgraph. Linear arrays (i.e., paths) and rings (i.e., cycles) are two ordinary guest graphs (or basic networks) for parallel and distributed computation. In the process of large-scale interconnection network operation, it is inevitable that various errors may occur at nodes and edges. It is significant to find an embedding of a guest graph into a host graph where all faulty nodes and edges have been removed. This is named as fault-tolerant embedding. The twisted hypercube-like networks ( T H L N s ) contain several important hypercube variants. This paper is concerned with the fault-tolerant path-embedding of n-dimensional (n-D) T H L N s . Let G n be an n-D T H L N and F be a subset of V ( G n ) ∪ E ( G n ) with | F | ≤ n - 2 . We show that for two different arbitrary correct vertices u and v, there is a faultless path P u v of every length l with 2 n - 1 - 1 ≤ l ≤ 2 n - f v - 1 - α , where α = 0 if vertices u and v form a normal vertex-pair and α = 1 if vertices u and v form a weak vertex-pair in G n - F ( n ≥ 5 ).


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