scholarly journals Fault-Tolerant Path-Embedding of Twisted Hypercube-Like Networks (THLNs)

Mathematics ◽  
2019 ◽  
Vol 7 (11) ◽  
pp. 1066
Author(s):  
Huifeng Zhang ◽  
Xirong Xu ◽  
Qiang Zhang ◽  
Yuansheng Yang
Keyword(s):  
Topological Structure ◽  
Large Scale ◽  
Fault Tolerant ◽  
Interconnection Network ◽  
Graph Embedding ◽  
Linear Arrays ◽  
Critical Issues ◽  
Vertex Set ◽  
Network Operation ◽  
Host Graph

It is known widely that an interconnection network can be denoted by a graph G = ( V , E ) , where V denotes the vertex set and E denotes the edge set. Investigating structures of G is necessary to design a suitable topological structure of interconnection network. One of the critical issues in evaluating an interconnection network is graph embedding, which concerns whether a host graph contains a guest graph as its subgraph. Linear arrays (i.e., paths) and rings (i.e., cycles) are two ordinary guest graphs (or basic networks) for parallel and distributed computation. In the process of large-scale interconnection network operation, it is inevitable that various errors may occur at nodes and edges. It is significant to find an embedding of a guest graph into a host graph where all faulty nodes and edges have been removed. This is named as fault-tolerant embedding. The twisted hypercube-like networks ( T H L N s ) contain several important hypercube variants. This paper is concerned with the fault-tolerant path-embedding of n-dimensional (n-D) T H L N s . Let G n be an n-D T H L N and F be a subset of V ( G n ) ∪ E ( G n ) with | F | ≤ n - 2 . We show that for two different arbitrary correct vertices u and v, there is a faultless path P u v of every length l with 2 n - 1 - 1 ≤ l ≤ 2 n - f v - 1 - α , where α = 0 if vertices u and v form a normal vertex-pair and α = 1 if vertices u and v form a weak vertex-pair in G n - F ( n ≥ 5 ).

scholarly journals An Efficient Interconnection System for Neural NOC Using Fault Tolerant Routing Method

2021 ◽  
Vol 2089 (1) ◽  
pp. 012069
Author(s):  
A. Pradeep kumar ◽  
Y. Devendar Reddy ◽  
T. Srinivas Reddy ◽  
K. Jamal
Keyword(s):  
Neural Network ◽  
Large Scale ◽  
Fault Tolerant ◽  
Interconnection Network ◽  
Heavy Traffic ◽  
Data Traffic ◽  
Field Programmable ◽  
Programmable Gate Arrays ◽  
On Chip ◽  
Hardware Costs

Abstract Large scale Neural Network (NN) accelerators typically have multiple processing nodes that can be implemented as a multi-core chip, and can be organized on a network of chips (noise) corresponding to neurons with heavy traffic. Portions of several NoC-based NN chip-to-chip interconnect networks are linked to further enhance overall nerve amplification capacity. Large volumes of multicast on-chip or cross-chip can further complicate the construction of a cross-link network and create a NN barrier of device capacity and resources. In this paper, this refer to inter-chip and inter-chip communication strategies known as neuron connection for NN accelerators. Interconnect for powerful fault-tolerant routing system neural NoC is implemented in this paper. This recommends crossbar arbitration placement, virtual interrupts, and path-based parallelization strategies in terms of intra-chip communications for the virtual channel routing resulting in higher NoC output at lower hardware costs. A lightweight NoC compatible chip-to-chip interconnection scheme is proposed regarding to inter-chip communication for multicast-based data traffic to enable efficient interconnection for NoC-based NN chips. Moreover, the proposed methods will be tested with four Field Programmable Gate Arrays (FPGAs) on four hard-wired deep neural network (DNN) chips. From the experimental results it can be illustrate that a high throguput can obtained effectively by the proposed interconnection network in handling thedata traffic and low DNN through advanced links.

A Linear Time Algorithm for Embedding Christmas Trees into Certain Trees

2015 ◽  
Vol 25 (04) ◽  
pp. 1550008
Author(s):  
Indra Rajasingh ◽  
R. Sundara Rajan ◽  
Paul Manuel
Keyword(s):  
Lower Bound ◽  
Interconnection Network ◽  
Linear Time ◽  
Graph Embedding ◽  
Time Algorithm ◽  
Linear Time Algorithm ◽  
Christmas Trees ◽  
Host Graph

Graph embedding is an important technique that maps a logical graph into a host graph, usually an interconnection network. In this paper, we compute the exact wirelength of embedding Christmas trees into trees. Moreover, we present an algorithm for embedding Christmas trees into caterpillars with dilation 3 proving that the lower bound obtained in [30] is sharp. Further, we solve the maximum subgraph problem for Christmas trees and provide a linear time algorithm to compute the exact wirelength of embedding Christmas trees into trees.

DISJOINT-PATHS AND FAULT-TOLERANT ROUTING ON RECURSIVE DUAL-NET

2011 ◽  
Vol 22 (05) ◽  
pp. 1001-1018 ◽  
Author(s):  
YAMIN LI ◽  
SHIETUNG PENG ◽  
WANMING CHU
Keyword(s):  
Fault Tolerant ◽  
Interconnection Network ◽  
Parallel Computers ◽  
Efficient Algorithms ◽  
Disjoint Paths ◽  
Node Degree ◽  
Huge Number ◽  
Critical Issues ◽  
Base Network ◽  
Short Diameter

The recursive dual-net is a newly proposed interconnection network for massive parallel computers. The recursive dual-net is based on recursive dual-construction of a symmetric base network. A k-level dual-construction for k > 0 creates a network containing (2n0)2k/2 nodes with node-degree d0 + k, where n0 and d0 are the number of nodes and the node-degree of the base network, respectively. The recursive dual-net is node and edge symmetric and can contain huge number of nodes with small node-degree and short diameter. Disjoint-paths routing and fault-tolerant routing are fundamental and critical issues for the performance of an interconnection network. In this paper, we propose efficient algorithms for disjoint-paths and fault-tolerant routings on the recursive dual-net.

Mutual Embeddings

2015 ◽  
Vol 15 (01n02) ◽  
pp. 1550001
Author(s):  
ILKER NADI BOZKURT ◽  
HAI HUANG ◽  
BRUCE MAGGS ◽  
ANDRÉA RICHA ◽  
MAVERICK WOO
Keyword(s):  
Iterative Methods ◽  
Lower Bounds ◽  
Linear Equations ◽  
Graph Embedding ◽  
Open Problems ◽  
Linear Arrays ◽  
Systems Of Linear Equations

This paper introduces a type of graph embedding called a mutual embedding. A mutual embedding between two n-node graphs [Formula: see text] and [Formula: see text] is an identification of the vertices of V1 and V2, i.e., a bijection [Formula: see text], together with an embedding of G1 into G2 and an embedding of G2 into G1 where in the embedding of G1 into G2, each node u of G1 is mapped to π(u) in G2 and in the embedding of G2 into G1 each node v of G2 is mapped to [Formula: see text] in G1. The identification of vertices in G1 and G2 constrains the two embeddings so that it is not always possible for both to exhibit small congestion and dilation, even if there are traditional one-way embeddings in both directions with small congestion and dilation. Mutual embeddings arise in the context of finding preconditioners for accelerating the convergence of iterative methods for solving systems of linear equations. We present mutual embeddings between several types of graphs such as linear arrays, cycles, trees, and meshes, prove lower bounds on mutual embeddings between several classes of graphs, and present some open problems related to optimal mutual embeddings.

scholarly journals Recent Advances in Unmanned Aerial Vehicles Forest Remote Sensing—A Systematic Review. Part II: Research Applications

Forests ◽  
2021 ◽  
Vol 12 (4) ◽  
pp. 397
Author(s):  
Riccardo Dainelli ◽  
Piero Toscano ◽  
Salvatore Filippo Di Gennaro ◽  
Alessandro Matese
Keyword(s):  
Remote Sensing ◽  
Unmanned Aerial Vehicle ◽  
Sustainable Management ◽  
Large Scale ◽  
Spectral Signature ◽  
Accurate Information ◽  
Data Interoperability ◽  
Critical Issues ◽  
Management Context ◽  
Aerial Vehicle

Forest sustainable management aims to maintain the income of woody goods for companies, together with preserving non-productive functions as a benefit for the community. Due to the progress in platforms and sensors and the opening of the dedicated market, unmanned aerial vehicle–remote sensing (UAV–RS) is improving its key role in the forestry sector as a tool for sustainable management. The use of UAV (Unmanned Aerial Vehicle) in precision forestry has exponentially increased in recent years, as demonstrated by more than 600 references published from 2018 until mid-2020 that were found in the Web of Science database by searching for “UAV”+“forest”. This result is even more surprising when compared with similar research for “UAV”+“agriculture”, from which emerge about 470 references. This shows how UAV–RS research forestry is gaining increasing popularity. In Part II of this review, analyzing the main findings of the reviewed papers (227), numerous strengths emerge concerning research technical issues. UAV–RS is fully applicated for obtaining accurate information from practical parameters (height, diameter at breast height (DBH), and biomass). Research effectiveness and soundness demonstrate that UAV–RS is now ready to be applied in a real management context. Some critical issues and barriers in transferring research products are also evident, namely,(1) hyperspectral sensors are poorly used, and their novel applications should be based on the capability of acquiring tree spectral signature especially for pest and diseases detection, (2) automatic processes for image analysis are poorly flexible or based on proprietary software at the expense of flexible and open-source tools that can foster researcher activities and support technology transfer among all forestry stakeholders, and (3) a clear lack exist in sensors and platforms interoperability for large-scale applications and for enabling data interoperability.

Single Chip Microcomputer Cluster Management

2014 ◽  
Vol 933 ◽  
pp. 584-589
Author(s):  
Zhi Chun Zhang ◽  
Song Wei Li ◽  
Wei Ren Wang ◽  
Wei Zhang ◽  
Li Jun Qi
Keyword(s):  
Real Time ◽  
Management System ◽  
Large Scale ◽  
Fault Tolerant ◽  
Single Chip ◽  
Single Chip Microcomputer ◽  
Cluster Management ◽  
The Real ◽  
Time Performance ◽  
Operational Phase

This paper presents a system in which the cluster devices are controlled by single-chip microcomputers, with emphasis on the cluster management techniques of single-chip microcomputers. Each device in a cluster is controlled by a single-chip microcomputer collecting sample data sent to and driving the device by driving data received from the same cluster management computer through COMs. The cluster management system running on the cluster management computer carries out such control as initial SCM identification, run time slice management, communication resource utilization, fault tolerance and error corrections on single-chip microcomputers. Initial SCM identification is achieved by signal responses between the single-chip microcomputers and the cluster management computer. By using the port priority and the parallelization of serial communications, the systems real-time performance is maximized. The real-time performance can be adjusted and improved by increasing or decreasing COMs and the ports linked to each COM, and the real-time performance can also be raised by configuring more cluster management computers. Fault-tolerant control occurs in the initialization phase and the operational phase. In the initialization phase, the cluster management system incorporates unidentified single-chip microcomputers into the system based on the history information recorded on external storage media. In the operational phase, if an operation error of reading and writing on a single-chip microcomputer reaches a predetermined threshold, the single-chip microcomputer is regarded as serious fault or not existing. The cluster management system maintains accuracy maintenance database on external storage medium to solve nonlinear control of specific devices and accuracy maintenance due to wear. The cluster management system uses object-oriented method to design a unified driving framework in order to enable the implementation of the cluster management system simplified, standardized and easy to transplant. The system has been applied in a large-scale simulation system of 230 single-chip microcomputers, which proves that the system is reliable, real-time and easy to maintain.

scholarly journals High-frequency oscillations and the neurobiology of schizophrenia

2013 ◽  
Vol 15 (3) ◽  
pp. 301-313 ◽  
Keyword(s):  
High Frequency ◽  
Large Scale ◽  
Oscillatory Activity ◽  
Current Evidence ◽  
Neural Oscillations ◽  
Future Research ◽  
Normal Brain ◽  
Brain Functions ◽  
Critical Issues ◽  
Underlying Mechanisms

Neural oscillations at low- and high-frequency ranges are a fundamental feature of large-scale networks. Recent evidence has indicated that schizophrenia is associated with abnormal amplitude and synchrony of oscillatory activity, in particular, at high (beta/gamma) frequencies. These abnormalities are observed during task-related and spontaneous neuronal activity which may be important for understanding the pathophysiology of the syndrome. In this paper, we shall review the current evidence for impaired beta/gamma-band oscillations and their involvement in cognitive functions and certain symptoms of the disorder. In the first part, we will provide an update on neural oscillations during normal brain functions and discuss underlying mechanisms. This will be followed by a review of studies that have examined high-frequency oscillatory activity in schizophrenia and discuss evidence that relates abnormalities of oscillatory activity to disturbed excitatory/inhibitory (E/I) balance. Finally, we shall identify critical issues for future research in this area.

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