Decreasing SoC Test Power Dissipation and Test Data Volume Based on Pattern Recombination

2011 ◽  
Author(s):  
Chunlei Mei ◽  
Maoxiang Yi ◽  
Zhifei Shen
Keyword(s):  
Test Data ◽  
Power Dissipation ◽  
Test Power ◽  
Soc Test ◽  
Data Volume

A Selective Scan Slice Encoding Technique for Test Data Volume and Test Power Reduction

2008 ◽  
Vol 24 (4) ◽  
pp. 353-364 ◽  
Author(s):  
N. Badereddine ◽  
Z. Wang ◽  
P. Girard ◽  
K. Chakrabarty ◽  
A. Virazel ◽  
...  
Keyword(s):  
Test Data ◽  
Power Reduction ◽  
Test Power ◽  
Data Volume ◽  
Test Power Reduction

SoC Test Data Compression Technique Based on RLE-G

2010 ◽  
Vol 439-440 ◽  
pp. 1595-1600
Author(s):  
Chun Jian Deng ◽  
Liu Wei ◽  
Xi Feng Zheng ◽  
Liang Yang
Keyword(s):  
Data Compression ◽  
Test Data ◽  
Test Time ◽  
Test Data Compression ◽  
Compression Technique ◽  
Current Test ◽  
Soc Test ◽  
Efficient Test ◽  
Data Volume ◽  
Test Vectors

Test data compression has been an effective way to reduce test data volume and test time, as well as to solve automatic test equipment (ATE) memory and bandwidth limitation. We analyze the limitations of current test data compression algorithm and draw on the previous experience to deduce an optimal compression coding model suitable for SoC test data. In addition, in this paper we make full use of the relevance of the test vectors and the advantages of statistical coding to present an efficient test data compression method RLE-G based on the coding model, and give the RLE-G the optimal compression efficiency of the boundary conditions and realization steps. The experimental results for ISCAS 89 benchmark circuits demonstrate RLE-G have the excellent advantages of high compression ratio.

Reducing test-data volume and test-power simultaneously in LFSR reseeding-based compression environment

2011 ◽  
Vol 32 (7) ◽  
pp. 075009 ◽  
Author(s):  
Weizheng Wang ◽  
Jishun Kuang ◽  
Zhiqiang You ◽  
Peng Liu
Keyword(s):  
Test Data ◽  
Test Power ◽  
Data Volume ◽  
Lfsr Reseeding
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