Exploiting Memory Access Patterns to Improve Memory Performance in Data-Parallel Architectures

2011 ◽  
Vol 22 (1) ◽  
pp. 105-118 ◽  
Author(s):  
Byunghyun Jang ◽  
Dana Schaa ◽  
Perhaad Mistry ◽  
David Kaeli
Keyword(s):  
Memory Performance ◽  
Parallel Architectures ◽  
Memory Access ◽  
Data Parallel ◽  
Access Patterns

scholarly journals Aristotle: A performance Impact Indicator for the OpenCL Kernels Using Local Memory

2014 ◽  
Vol 22 (3) ◽  
pp. 239-257 ◽  
Author(s):  
Jianbin Fang ◽  
Henk Sips ◽  
Ana Lucia Varbanescu
Keyword(s):  
Memory Performance ◽  
Empirical Evaluation ◽  
Memory Access ◽  
Performance Impact ◽  
Impact Indicator ◽  
Local Memory ◽  
Performance Variability ◽  
Access Patterns ◽  
Many Core ◽  
Do So

Due to the increasing complexity of multi/many-core architectures (with their mix of caches and scratch-pad memories) and applications (with different memory access patterns), the performance of many workloads becomes increasingly variable. In this work, we address one of the main causes for this performance variability: the efficiency of the memory system. Specifically, based on an empirical evaluation driven by memory access patterns, we qualify and partially quantify the performance impact of using local memory in multi/many-core processors. To do so, we systematically describe memory access patterns (MAPs) in an application-agnostic manner. Next, for each identified MAP, we use OpenCL (for portability reasons) to generate two microbenchmarks: a “naive” version (without local memory) and “an optimized” version (using local memory). We then evaluate both of them on typically used multi-core and many-core platforms, and we log their performance. What we eventually obtain is a local memory performance database, indexed by various MAPs and platforms. Further, we propose a set of composing rules for multiple MAPs. Thus, we can get an indicator of whether using local memory is beneficial in the presence of multiple memory access patterns. This indication can be used to either avoid the hassle of implementing optimizations with too little gain or, alternatively, give a rough prediction of the performance gain.

scholarly journals Understanding memory access patterns using the BSC performance tools

2018 ◽  
Vol 78 ◽  
pp. 1-14 ◽  
Author(s):  
Harald Servat ◽  
Jesús Labarta ◽  
Hans-Christian Hoppe ◽  
Judit Giménez ◽  
Antonio J. Peña
Keyword(s):  
Memory Access ◽  
Access Patterns

scholarly journals An Efficient GPU Cache Architecture for Applications with Irregular Memory Access Patterns

2019 ◽  
Vol 16 (3) ◽  
pp. 1-24
Author(s):  
Bingchao Li ◽  
Jizeng Wei ◽  
Jizhou Sun ◽  
Murali Annavaram ◽  
Nam Sung Kim
Keyword(s):  
Memory Access ◽  
Cache Architecture ◽  
Access Patterns

scholarly journals A Neural Network Prefetcher for Arbitrary Memory Access Patterns

2020 ◽  
Vol 16 (4) ◽  
pp. 1-27 ◽  
Author(s):  
Leeor Peled ◽  
Uri Weiser ◽  
Yoav Etsion
Keyword(s):  
Neural Network ◽  
Memory Access ◽  
Access Patterns

scholarly journals Recovering memory access patterns of executable programs

2014 ◽  
Vol 80 ◽  
pp. 440-456
Author(s):  
Alain Ketterlin ◽  
Philippe Clauss
Keyword(s):  
Memory Access ◽  
Access Patterns ◽  
Executable Programs
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