Efficient algorithms for the all nearest neighbor and closest pair problems on the linear array with a reconfigurable pipelined bus system

2005 ◽  
Vol 16 (3) ◽  
pp. 193-206 ◽  
Author(s):  
Yuh-Rau Wang ◽  
Shi-Jinn Horng ◽  
Chin-Hsiung Wu
1993 ◽  
Vol 03 (02) ◽  
pp. 157-164 ◽  
Author(s):  
P. THANGAVEL ◽  
V.P. MUTHUSWAMY

A simple parallel algorithm for generating N-ary reflected Gray codes is presented. The algorithm is derived from the pattern of N-ary reflected Gray codes. The algorithm runs on a linear processor array with a reconfigurable bus system. A reconfigurable bus system is a bus system whose configuration can be dynamically changed. Recently processor arrays with reconfigurable bus systems were used to solve many problems in constant time. There already exists experimental reconfigurable chips.


1994 ◽  
Vol 27 (12) ◽  
pp. 1707-1716 ◽  
Author(s):  
Tzong-Wann Kao ◽  
Shi-Jinn Horng

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