Efficient graph algorithms on a linear array with a reconfigurable pipelined bus system

Author(s):  
A. Datta
1993 ◽  
Vol 03 (02) ◽  
pp. 157-164 ◽  
Author(s):  
P. THANGAVEL ◽  
V.P. MUTHUSWAMY

A simple parallel algorithm for generating N-ary reflected Gray codes is presented. The algorithm is derived from the pattern of N-ary reflected Gray codes. The algorithm runs on a linear processor array with a reconfigurable bus system. A reconfigurable bus system is a bus system whose configuration can be dynamically changed. Recently processor arrays with reconfigurable bus systems were used to solve many problems in constant time. There already exists experimental reconfigurable chips.


1999 ◽  
Vol 09 (03) ◽  
pp. 373-383 ◽  
Author(s):  
HOSSAM ELGINDY ◽  
SANGUTHEVAR RAJASEKARAN

In this paper we present randomized algorithms for selection and sorting on linear arrays with optical bus communication systems. We show that sorting n given numbers can be performed in O( log n) time with high probability on a linear array, of n processors, with a reconfigurable optical bus system (Linear-AROB). We also show that selection can be performed in O(1) time with high probability on the same parallel machine model.


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