On-Chip Real-Time Correction for a 20-ps Wave Union Time-To-Digital Converter (TDC) in a Field-Programmable Gate Array (FPGA)

Ji Qi; Hui Gong; Yinong Liu

doi:10.1109/tns.2012.2201952

On-Chip Real-Time Correction for a 20-ps Wave Union Time-To-Digital Converter (TDC) in a Field-Programmable Gate Array (FPGA)

IEEE Transactions on Nuclear Science ◽

10.1109/tns.2012.2201952 ◽

2012 ◽

Vol 59 (4) ◽

pp. 1605-1610 ◽

Cited By ~ 6

Author(s):

Ji Qi ◽

Hui Gong ◽

Yinong Liu

Keyword(s):

Real Time ◽

Field Programmable Gate Array ◽

Digital Converter ◽

Time To Digital Converter ◽

Field Programmable ◽

Time Correction ◽

Gate Array ◽

On Chip

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A flexible 32-channel time-to-digital converter implemented in a Xilinx Zynq-7000 field programmable gate array

Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment ◽

10.1016/j.nima.2016.11.031 ◽

2017 ◽

Vol 847 ◽

pp. 61-66 ◽

Cited By ~ 3

Author(s):

Yonggang Wang ◽

Jie Kuang ◽

Chong Liu ◽

Qiang Cao ◽

Deng Li

Keyword(s):

Field Programmable Gate Array ◽

Digital Converter ◽

Time To Digital Converter ◽

Field Programmable ◽

Gate Array

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A high-resolution time-to-digital converter based on multi-phase clock implement in field-programmable-gate-array

2012 18th IEEE-NPSS Real Time Conference ◽

10.1109/rtc.2012.6418217 ◽

2012 ◽

Cited By ~ 5

Author(s):

Zhoujiancheng Yin ◽

Shubin Liu ◽

Xinjun Hao ◽

Shanshan Gao ◽

Qi An

Keyword(s):

High Resolution ◽

Field Programmable Gate Array ◽

Digital Converter ◽

Resolution Time ◽

Time To Digital Converter ◽

Field Programmable ◽

Phase Clock ◽

Gate Array ◽

Multi Phase

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Field-programmable-gate-array-based time-to-digital converter with 200-ps resolution

IEEE Transactions on Instrumentation and Measurement ◽

10.1109/19.552156 ◽

1997 ◽

Vol 46 (1) ◽

pp. 51-55 ◽

Cited By ~ 108

Author(s):

J. Kalisz ◽

R. Szplet ◽

J. Pasierbinski ◽

A. Poniecki

Keyword(s):

Field Programmable Gate Array ◽

Digital Converter ◽

Time To Digital Converter ◽

Field Programmable ◽

Gate Array

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Time-to-Digital Converter of Side by side tap-delay method implemented in Field-Programmable Gate Array(FPGA) for high resolution and accuracy

Journal of the Institute of Electronics and Information Engineers ◽

10.5573/ieie.2017.54.9.116 ◽

2017 ◽

Vol 54 (9) ◽

pp. 116-123

Author(s):

Dawon Lee ◽

Gyunha Kim ◽

Hansang Lim

Keyword(s):

High Resolution ◽

Field Programmable Gate Array ◽

Digital Converter ◽

Time To Digital Converter ◽

Field Programmable ◽

Gate Array

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A PVT insensitive field programmable gate array time-to-digital converter

2013 IEEE Nordic-Mediterranean Workshop on Time-to-Digital Converters (NoMe TDC) ◽

10.1109/nometdc.2013.6658232 ◽

2013 ◽

Cited By ~ 2

Author(s):

Poki Chen ◽

Hsiu Che Cheng ◽

Arif Widodo ◽

Wei Xiang Tsai

Keyword(s):

Field Programmable Gate Array ◽

Digital Converter ◽

Time To Digital Converter ◽

Field Programmable ◽

Gate Array

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High resolution time-to-digital converter (TDC) implemented in field programmable gate array (FPGA) with compensated process voltage and temperature (PVT) variations

Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment ◽

10.1016/j.nima.2012.04.040 ◽

2012 ◽

Vol 682 ◽

pp. 16-25 ◽

Cited By ~ 15

Author(s):

C. Hervé ◽

J. Cerrai ◽

T. Le Caër

Keyword(s):

High Resolution ◽

Field Programmable Gate Array ◽

Digital Converter ◽

Resolution Time ◽

Time To Digital Converter ◽

Field Programmable ◽

Pvt Variations ◽

Gate Array

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A counting-weighted calibration method for a field-programmable-gate-array-based time-to-digital converter

Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment ◽

10.1016/j.nima.2017.02.053 ◽

2017 ◽

Vol 854 ◽

pp. 61-63 ◽

Cited By ~ 4

Author(s):

Yuan-Ho Chen

Keyword(s):

Field Programmable Gate Array ◽

Calibration Method ◽

Digital Converter ◽

Time To Digital Converter ◽

Field Programmable ◽

Gate Array

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A high-resolution (< 10 ps RMS) 32-Channel Time-to-Digital Converter (TDC) implemented in a Field Programmable Gate Array (FPGA)

2010 17th IEEE-NPSS Real Time Conference ◽

10.1109/rtc.2010.5750361 ◽

2010 ◽

Cited By ~ 8

Author(s):

Eugen Bayer ◽

Michael Traxler

Keyword(s):

High Resolution ◽

Field Programmable Gate Array ◽

Digital Converter ◽

Time To Digital Converter ◽

Field Programmable ◽

Gate Array

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A time-to-digital-converter utilizing bits-counters to decode carry-chains and DSP48E1 slices in a field-programmable-gate-array

Journal of Instrumentation ◽

10.1088/1748-0221/16/02/p02009 ◽

2021 ◽

Vol 16 (02) ◽

pp. P02009-P02009

Author(s):

M.-D. Zhu ◽

X. Qin ◽

L. Wang ◽

W.-Z. Zhang ◽

Y. Lin ◽

...

Keyword(s):

Field Programmable Gate Array ◽

Digital Converter ◽

Time To Digital Converter ◽

Field Programmable ◽

Gate Array

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Field-Programmable Gate Array-based Time-to-Digital Converter using Pulse-train Input Method for Large Dynamic Range

Journal of the Institute of Electronics and Information Engineers ◽

10.5573/ieie.2015.52.6.137 ◽

2015 ◽

Vol 52 (6) ◽

pp. 137-143

Author(s):

Do-hyung Kim ◽

Han-sang Lim

Keyword(s):

Field Programmable Gate Array ◽

Pulse Train ◽

Dynamic Range ◽

Digital Converter ◽

Large Dynamic Range ◽

Time To Digital Converter ◽

Input Method ◽

Field Programmable ◽

Gate Array

Download Full-text

On-Chip Real-Time Correction for a 20-ps Wave Union Time-To-Digital Converter (TDC) in a Field-Programmable Gate Array (FPGA)

A flexible 32-channel time-to-digital converter implemented in a Xilinx Zynq-7000 field programmable gate array

A high-resolution time-to-digital converter based on multi-phase clock implement in field-programmable-gate-array

Field-programmable-gate-array-based time-to-digital converter with 200-ps resolution

Time-to-Digital Converter of Side by side tap-delay method implemented in Field-Programmable Gate Array(FPGA) for high resolution and accuracy

A PVT insensitive field programmable gate array time-to-digital converter

High resolution time-to-digital converter (TDC) implemented in field programmable gate array (FPGA) with compensated process voltage and temperature (PVT) variations

A counting-weighted calibration method for a field-programmable-gate-array-based time-to-digital converter

A high-resolution (&#60; 10 ps RMS) 32-Channel Time-to-Digital Converter (TDC) implemented in a Field Programmable Gate Array (FPGA)

A time-to-digital-converter utilizing bits-counters to decode carry-chains and DSP48E1 slices in a field-programmable-gate-array

Field-Programmable Gate Array-based Time-to-Digital Converter using Pulse-train Input Method for Large Dynamic Range

A high-resolution (< 10 ps RMS) 32-Channel Time-to-Digital Converter (TDC) implemented in a Field Programmable Gate Array (FPGA)