Data compression for multiple scan chains using dictionaries with corrections

2004 International Conferce on Test ◽

10.1109/test.2004.1387357 ◽

2005 ◽

Cited By ~ 38

Author(s):

A. Wurtenberger ◽

C.S. Tautermann ◽

S. Hellebrand

Keyword(s):

Data Compression ◽

Multiple Scan ◽

Scan Chains

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Multilevel-Huffman Test-Data Compression for IP Cores With Multiple Scan Chains

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2008.2000448 ◽

2008 ◽

Vol 16 (7) ◽

pp. 926-931 ◽

Cited By ~ 29

Author(s):

Xrysovalantis Kavousianos ◽

Emmanouil Kalligeros ◽

Dimitris Nikolos

Keyword(s):

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Multiple Scan ◽

Scan Chains ◽

Ip Cores

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On interconnecting circuits with multiple scan chains for improved test data compression

17th International Conference on VLSI Design. Proceedings. ◽

10.1109/icvd.2004.1261016 ◽

2004 ◽

Cited By ~ 1

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Multiple Scan ◽

Scan Chains

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Selective Low-Care Coding: A Means for Test Data Compression in Circuits with Multiple Scan Chains

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1093/ietfec/e89-a.4.996 ◽

2006 ◽

Vol E89-A (4) ◽

pp. 996-1004

Author(s):

Y. SHI

Keyword(s):

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Multiple Scan ◽

Scan Chains

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Design of Test Compression for Multiple Scan Chains Circuits

10.1109/icscan53069.2021.9526387 ◽

2021 ◽

Author(s):

D Manasa Manikya ◽

Marala Jagruthi ◽

Rana Anjum ◽

Ashok Kumar K

Keyword(s):

Test Compression ◽

Multiple Scan ◽

Scan Chains

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Test Power Minimization Using Multiple Scan Chains

Power-constrained Testing of VLSI Circuits - Frontiers in Electronic Testing ◽

10.1007/0-306-48731-4_5 ◽

2006 ◽

pp. 87-112

Keyword(s):

Power Minimization ◽

Test Power ◽

Multiple Scan ◽

Scan Chains

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Parahel core testing with multiple scan chains by test vector overlapping

2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test, 2005. (VLSI-TSA-DAT). ◽

10.1109/vdat.2005.1500056 ◽

2005 ◽

Cited By ~ 1

Author(s):

T. Shinogi ◽

Y. Yamada ◽

T. Hayashi ◽

T. Yoshikawa ◽

S. Tsuruoka

Keyword(s):

Test Vector ◽

Multiple Scan ◽

Scan Chains

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Operation about multiple scan chains based on system-on-chip

2008 International SoC Design Conference ◽

10.1109/socdc.2008.4815716 ◽

2008 ◽

Cited By ~ 3

Author(s):

Insoo Kim ◽

Hyoung Bok Min

Keyword(s):

System On Chip ◽

Multiple Scan ◽

Scan Chains ◽

On Chip

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Scan-BIST based on transition probabilities for circuits with single and multiple scan chains

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2005.854634 ◽

2006 ◽

Vol 25 (3) ◽

pp. 591-596 ◽

Cited By ~ 5

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Transition Probabilities ◽

Multiple Scan ◽

Scan Chains

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Energy-Efficient Scheme for Multiple Scan-Chains BIST Using Weight-Based Segmentation

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2016.2617160 ◽

2018 ◽

Vol 65 (3) ◽

pp. 361-365 ◽

Cited By ~ 2

Author(s):

Abdallatif S. Abu-Issa

Keyword(s):

Energy Efficient ◽

Multiple Scan ◽

Efficient Scheme ◽

Scan Chains

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A Multilayer Data Copy Test Data Compression Scheme for Reducing Shifting-in Power for Multiple Scan Design

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2007.899232 ◽

2007 ◽

Vol 15 (7) ◽

pp. 767-776 ◽

Cited By ~ 22

Author(s):

Shih-Ping Lin ◽

Chung-Len Lee ◽

Jwu-E Chen ◽

Ji-Jan Chen ◽

Kun-Lun Luo ◽

...

Keyword(s):

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Scan Design ◽

Compression Scheme ◽

Multiple Scan

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