Open architecture test system: system architecture and design

2005 ◽  
Author(s):  
R. Rajsuman ◽  
M. Noriyuki
Keyword(s):  
System Architecture ◽  
Test System ◽  
Open Architecture ◽  
Architecture And Design

scholarly journals SAFARI optical system architecture and design concept

2016 ◽  
Author(s):  
Carmen Pastor ◽  
Willem Jellema ◽  
Pablo Zuluaga-Ramírez ◽  
David Arrazola ◽  
M. Fernández-Rodriguez ◽  
...  
Keyword(s):  
Optical System ◽  
System Architecture ◽  
Design Concept ◽  
Architecture And Design

Research on OpenGL Based Virtual Simulation Environment for Non-Lethal Weapon System

2014 ◽  
Vol 543-547 ◽  
pp. 3402-3405
Author(s):  
Ling Lu
Keyword(s):  
System Architecture ◽  
Dynamic Geometry ◽  
Simulation System ◽  
Virtual Simulation ◽  
Weapon System ◽  
Simulation Environment ◽  
Geometry Modeling ◽  
Architecture And Design

The design and realization of virtual simulation environment for non-lethal weapon system is presented. Besides the system architecture and design conception, several key problems and our solutions when developing a virtual simulation system, such as OpenGL based on dynamic geometry modeling, scene organization, and interaction are discussed.

scholarly journals A Design Technique for Adapting Number and Boundaries of Reconfigurable Modules at Runtime

2009 ◽  
Vol 2009 ◽  
pp. 1-10 ◽  
Author(s):  
Thilo Pionteck ◽  
Roman Koch ◽  
Carsten Albrecht ◽  
Erik Maehle
Keyword(s):  
System Architecture ◽  
Design Tool ◽  
Design Flow ◽  
Design Tools ◽  
System Architectures ◽  
Flexible System ◽  
Reconfigurable System ◽  
Communication Needs ◽  
On Chip ◽  
Architecture And Design

Runtime reconfigurable system-on-chip designs for FPGAs pose manifold demands on the underlying system architecture and design tool capabilities. The system architecture has to support varying communication needs of a changing number of processing units mapped onto diverse locations. Design tools should support an arbitrary placement of processing modules and the adjustment of boundaries of reconfigurable regions to the size of the actually instantiated processing modules. While few works address the design of flexible system architectures, the adjustment of boundaries of reconfigurable regions to the size of the actually instantiated processing modules is hardly ever considered due to design tool limitations. In this paper, a technique for circumventing this restriction is presented. It allows for a rededication of the reconfigurable area to a different number of individually sized reconfigurable regions. This technique is embedded in the design flow of a runtime reconfigurable system architecture for Xilinx Virtex-4 FPGAs. The system architecture will also be presented to provide a realistic application example.

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