Test point insertion for compact test sets

Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159) ◽

10.1109/test.2000.894217 ◽

2002 ◽

Cited By ~ 28

Author(s):

M.J. Geuzebroek ◽

J.T. van der Linden ◽

A.J. van de Goor

Keyword(s):

Test Point ◽

Test Point Insertion ◽

Test Sets ◽

Compact Test

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Improving Test Coverage of Hi-Reliability ASIC Designs with Test Point Insertion for Space Applications

2020 International Conference on Smart Electronics and Communication (ICOSEC) ◽

10.1109/icosec49089.2020.9215342 ◽

2020 ◽

Author(s):

K Padmapriya ◽

B.K.S.V.L. Varaprasad

Keyword(s):

Test Point ◽

Test Coverage ◽

Space Applications ◽

Test Point Insertion

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Test point insertion for an area efficient BIST

Proceedings of 1995 IEEE International Test Conference (ITC) ◽

10.1109/test.1995.529879 ◽

2002 ◽

Cited By ~ 23

Author(s):

C. Schotten ◽

H. Meyr

Keyword(s):

Test Point ◽

Test Point Insertion ◽

Area Efficient

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A method to derive compact test sets for path delay faults in combinational circuits

Proceedings of IEEE International Test Conference - (ITC) ◽

10.1109/test.1993.470630 ◽

2002 ◽

Cited By ~ 27

Author(s):

J. Saxena ◽

D.K. Pradhan

Keyword(s):

Delay Faults ◽

Path Delay ◽

Combinational Circuits ◽

Path Delay Faults ◽

Test Sets ◽

Compact Test

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A Survey on Test Point Insertion (TPI) Schemes

2020 International Conference on Inventive Computation Technologies (ICICT) ◽

10.1109/icict48043.2020.9112405 ◽

2020 ◽

Author(s):

K. Padmapriya ◽

B.K.S.V.L Varaprasad ◽

N. Varalakshmi

Keyword(s):

Test Point ◽

Test Point Insertion

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Test Point Insertion Using Artificial Neural Networks

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) ◽

10.1109/isvlsi.2019.00054 ◽

2019 ◽

Cited By ~ 3

Author(s):

Yang Sun ◽

Spencer Millican

Keyword(s):

Neural Networks ◽

Artificial Neural Networks ◽

Test Point ◽

Test Point Insertion ◽

Artificial Neural

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RT-level test point insertion for sequential circuits

First International Workshop onTestability Assessment, 2004. IWoTA 2004. Proceedings. ◽

10.1109/iwota.2004.1428412 ◽

2006 ◽

Cited By ~ 1

Author(s):

J. Raik ◽

V. Govind ◽

R. Ubar

Keyword(s):

Test Point ◽

Sequential Circuits ◽

Test Point Insertion

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A Strategy for Optimal Test Point Insertion in Analog Cascaded Filters

Journal of Electronic Testing ◽

10.1007/s10836-005-5283-x ◽

2005 ◽

Vol 21 (1) ◽

pp. 9-16

Author(s):

F. Aza�s ◽

M. Lubaszewski ◽

P. Nouet ◽

M. Renovell

Keyword(s):

Test Point ◽

Optimal Test ◽

Test Point Insertion ◽

Cascaded Filters

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Pseudorandom scan BIST using improved test point insertion techniques

Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004. ◽

10.1109/icsict.2004.1435244 ◽

2005 ◽

Author(s):

Ming-Jing Chen ◽

Dong Xiang

Keyword(s):

Test Point ◽

Test Point Insertion ◽

Insertion Techniques

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Compact test sets for industrial circuits

Proceedings 13th IEEE VLSI Test Symposium ◽

10.1109/vtest.1995.512661 ◽

2002 ◽

Cited By ~ 10

Author(s):

M.H. Konijnenburg ◽

J.T. van der Linden ◽

A.J. van de Goor

Keyword(s):

Test Sets ◽

Industrial Circuits ◽

Compact Test

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Generation of compact test sets with high defect coverage

2009 Design, Automation & Test in Europe Conference & Exhibition ◽

10.1109/date.2009.5090833 ◽

2009 ◽

Cited By ~ 10

Author(s):

X. Kavousianos ◽

K. Chakrabarty

Keyword(s):

Defect Coverage ◽

Test Sets ◽

Compact Test

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