Deterministic self-test of a high-speed embedded memory and logic processor subsystem

2002 ◽  
Author(s):  
L. Ternullo ◽  
R.D. Adams ◽  
J. Connor ◽  
G.S. Koch
Keyword(s):  
High Speed ◽  
Embedded Memory ◽  
Self Test

Laser Silicon Interaction Study on Ring Oscillators to Establish Temperature Voltage Dependency Trends on 14 nm and Future FinFET Technologies

2017 ◽  
Author(s):  
Gaurav Mattey ◽  
Lava Ranganathan
Keyword(s):  
High Speed ◽  
Laser Frequency ◽  
Ring Oscillator ◽  
Switching Speed ◽  
Dual Nature ◽  
Voltage Imaging ◽  
Multiple Cores ◽  
Speed Performance ◽  
Self Test ◽  
Frequency Changes

Abstract Critical speed path analysis using Dynamic Laser Stimulation (DLS) technique has been an indispensable technology used in the Semiconductor IC industry for identifying process defects, design and layout issues that limit product speed performance. Primarily by injecting heat or injecting photocurrent in the active diffusion of the transistors, the laser either slows down or speeds up the switching speed of transistors, thereby affecting the overall speed performance of the chip and revealing the speed limiting/enhancing circuits. However, recently on Qualcomm Technologies’ 14nm FinFET technology SOC product, the 1340nm laser’s heating characteristic revealed a Vt (threshold voltage) improvement behavior at low operating voltages which helped identify process issues on multiple memory array blocks across multiple cores failing for MBIST (Memory Built-in Self-test). In this paper, we explore the innovative approach of using the laser to study Vt shifts in transistors due to process issues. We also study the laser silicon interactions through scanning the 1340nm thermal laser on silicon and observing frequency shifts in a high-speed Ring Oscillator (RO) on 16nm FinFET technology. This revealed the normal and reverse Temperature Dependency Gate voltages for 16nm FinFET, thereby illustrating the dual nature of stimulation (reducing mobility and improving Vt) from a thermal laser. Frequency mapping through Laser Voltage Imaging (LVI) was performed on the Ring Oscillator (RO) using the 1340nm thermal laser, while concurrently stimulating the transistors of the RO. Spatial distribution of stimulation was studied by observing the frequency changes on LVI.

Design for Testability of High-Speed Advance Multipliers

2020 ◽  
pp. 175-190
Author(s):  
Suman Lata Tripathi
Keyword(s):  
High Speed ◽  
High Performance ◽  
Design For Testability ◽  
Online Testing ◽  
Efficient Design ◽  
Self Test ◽  
Built In Self Test ◽  
Work Done ◽  
Testing Work ◽  
Circuit Under Test

An efficient design for testability (DFT) has been a major thrust of area for today's VLSI engineers. A poorly designed DFT would result in losses for manufacturers with a considerable rework for the designers. BIST (built-in self-test), one of the promising DFT techniques, is rapidly modifying with the advances in technology as the device shrinks. The increasing complexities of the hardware have shifted the trend to include BISTs in high performance circuitry for offline as well as online testing. Work done here involves testing a circuit under test (CUT) with built in response analyser and vector generator with a monitor to control all the activities.

A Half-Rate Built-In Self-Test for High-Speed Serial Interface using a PRBS Generator and Checker

2019 ◽  
Author(s):  
Ram Ratnaker Reddy Bodha ◽  
Sahar Sarafi ◽  
Ajinkya Kale ◽  
Michael Koberle ◽  
Johannes Sturm
Keyword(s):  
High Speed ◽  
Serial Interface ◽  
Self Test ◽  
Built In Self Test

Perpendicular STT-MRAM for high speed non-volatile embedded memory application

2015 ◽  
Author(s):  
P. Wang ◽  
G. Jan ◽  
L. Thomas ◽  
Y. Lee ◽  
H. Liu ◽  
...  
Keyword(s):  
High Speed ◽  
Embedded Memory

W-Polymetal Gate with Low W/Poly-Si Interface Resistance for High-Speed/High-Density Embedded Memory

2004 ◽  
Vol 43 (4B) ◽  
pp. 1799-1803 ◽  
Author(s):  
Tomohiro Yamashita ◽  
Yukio Nishida ◽  
Kiyoshi Hayashi ◽  
Takahisa Eimori ◽  
Masahide Inuishi ◽  
...  
Keyword(s):  
High Speed ◽  
High Density ◽  
Embedded Memory ◽  
Interface Resistance

A Precise Design for Testing High-Speed Embedded Memory using a BIST Circuit

2017 ◽  
Vol 63 (4) ◽  
pp. 473-481
Author(s):  
Lijun Zhang ◽  
Ziou Wang ◽  
Youzhong Li ◽  
Lingfeng Mao
Keyword(s):  
High Speed ◽  
Embedded Memory
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