Optimal placement of IEEE 1149.1 test port and boundary scan resources for wafer scale integration
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1988 ◽
Vol 135
(6)
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pp. 281
1995 ◽
Vol 06
(04)
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pp. 631-645
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2019 ◽
Vol 27
(2)
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pp. 304-315
1985 ◽
Vol 1
(4)
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pp. 24-34
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