An AES processing system with a compact CPU core for secure communication in embedded systems

2012 ◽  
Author(s):  
Daisuke Tsutsumi ◽  
Isao Ohmura ◽  
Tsukasa Abe ◽  
Hitoshi Yoshimura ◽  
Kiyoshi Inagawa
Keyword(s):  
Embedded Systems ◽  
Secure Communication ◽  
Processing System

scholarly journals Analyzing and Comparing the Performance of National Biometric eID Card in Heavy Cryptographic Applications

2018 ◽  
Vol 1 (4) ◽  
pp. 37
Author(s):  
Gazmend Krasniqi ◽  
Petrit Rama ◽  
Blerim Rexha
Keyword(s):  
Secure Communication ◽  
Electronic Devices ◽  
Processing System ◽  
The Internet ◽  
End User ◽  
Processing Power ◽  
Identity Cards ◽  
Test Vectors ◽  
And Storage ◽  
User Device

Today, we are witnessing increased demand for more speed and capacity in the Internet, and more processing power and storage in every end user device. Demand for greater performance is present in every system. Electronic devices and their hosted applications need to be fast, but not to lose their main security features. Authentication and encryption are the main processes in the security aspect, and are required for a secure communication. These processes can be executed in different devices, among them PCs, microprocessors, microcontrollers, biometric cards or mobile devices. Biometric identity cards are becoming increasingly popular, challenging traditional PC devices. This paper compares two processing systems, the efficiency of encryption and signatures on the data executed in national identity biometric card versus PC, known also as the match-on-card versus the match-off-card. It considers how different parameters impact the process and the role they play on the overall process. The results, executed with a predefined set of test vectors, determine which processing system to use in a certain situation. Final conclusions and recommendations are given taking into consideration the efficiency and security of the data.

scholarly journals Prime Field ECDSA Signature Processing for Reconfigurable Embedded Systems

2011 ◽  
Vol 2011 ◽  
pp. 1-12 ◽  
Author(s):  
Benjamin Glas ◽  
Oliver Sander ◽  
Vitali Stuckert ◽  
Klaus D. Müller-Glaser ◽  
Jürgen Becker
Keyword(s):  
Embedded Systems ◽  
Digital Signature ◽  
Processing System ◽  
Application Integration ◽  
Prime Field ◽  
Vehicle Communication ◽  
Flexible System ◽  
Vehicle To Vehicle ◽  
Prime Fields ◽  
Dedicated Hardware

Growing ubiquity and safety relevance of embedded systems strengthen the need to protect their functionality against malicious attacks. Communication and system authentication by digital signature schemes is a major issue in securing such systems. This contribution presents a complete ECDSA signature processing system over prime fields for bit lengths of up to 256 on reconfigurable hardware. By using dedicated hardware implementation, the performance can be improved by up to two orders of magnitude compared to microcontroller implementations. The flexible system is tailored to serve as an autonomous subsystem providing authentication transparent for any application. Integration into a vehicle-to-vehicle communication system is shown as an application example.

VERIFICATION OF EMBEDDED SUPERVISORY CONTROLLERS CONSIDERING HYBRID PLANT DYNAMICS

2005 ◽  
Vol 15 (02) ◽  
pp. 307-312 ◽  
Author(s):  
SEBASTIAN ENGELL ◽  
SVEN LOHMANN ◽  
OLAF STURSBERG
Keyword(s):  
Model Checking ◽  
Embedded Systems ◽  
Timed Automata ◽  
Processing System ◽  
Hybrid Plant ◽  
Graph Grammars ◽  
Safety Properties ◽  
Hybrid Automaton ◽  
Plant Behavior ◽  
Hybrid Dynamics

This contribution proposes a link between the specification of supervisory controllers by Sequential Function Charts (SFC) and the verification of embedded systems with hybrid dynamics. The SFC are transformed into modular timed automata using a procedure based on graph grammars. The resulting controller model is composed with a hybrid automaton (with possibly nonlinear continuous dynamics) that models the plant behavior. In order to verify safety properties of the composed system algorithmically, a tool implementing the recently proposed approach of counterexample guided model checking is employed. The procedure is illustrated for a processing system example.

scholarly journals Design and Analysis of Power Efficient 64-Bit ALCCU

2019 ◽  
Vol 8 (2) ◽  
pp. 162-166
Keyword(s):  
Embedded Systems ◽  
High Speed ◽  
Low Voltage ◽  
Processing System ◽  
Hardware Description Language ◽  
Description Language ◽  
Power Efficient ◽  
Structural Style ◽  
Two Factors ◽  
Hardware Description

Speed of any system depends on mainly two factors known as frequency and parllel processing. Such high speed processing systems are required in real time embedded systems. The existed systems are operated with maximum of 2 to 3 GHz. The proposed 64-bit ALCCU is a high-speed processing system that will perform arithmetic, logical and code conversion operations. It is implemented in structural style with Verilog Hardware Description Language. This design is a high speed, low powered and will perform 32 operations. Its data size is 64_bit, implemented on xc7a100tcsg324-1 which is an Artix 7, 100K gate technology FPGA with a CSG 324 package. Satisfactory low power (less than 1W) has been observed with varying clock rates of ranging from 10 MHz to 20 GHz. The analysis is done with Low Voltage CMOS I/O standards from 1.2 to 3.3V range. The application of the proposed design can be used as an IP in high speed processors and controllers.

scholarly journals SSPSoC: A Secure SDN-Based Protocol over MPSoC

2019 ◽  
Vol 2019 ◽  
pp. 1-11 ◽  
Author(s):  
Soultana Ellinidou ◽  
Gaurav Sharma ◽  
Théo Rigas ◽  
Tristan Vanspouwen ◽  
Olivier Markowitch ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Integrated Circuits ◽  
Secure Communication ◽  
Data Exchange ◽  
Network Performance ◽  
Key Agreement ◽  
Critical Systems ◽  
Memory Consumption ◽  
Safety Critical ◽  
Private Key

In recent years, Multi-Processor System-on-Chips (MPSoCs) are widely deployed in safety-critical embedded systems. The Cloud-of-Chips (CoC) is a scalable MPSoC architecture comprised of a large number of interconnected Integrated Circuits (IC) and Processing Clusters (PC) destined for critical systems. While many researches have focused on addressing the hardware issues of MPSoCs, the communication over them has not been very well explored. Following the SDN concept, we propose a new protocol in order to secure the communication and efficiently manage the routing within the CoC. The SSPSoC includes a private key derivation phase, a group key agreement (GKA) phase, and a data exchange phase in order to ensure that basic security primitives are preserved and provide secure communication. Furthermore, a network of 1-30 nodes is set in order to validate the proposed protocol and measure the network performance and memory consumption of the proposed protocol.

Research of Embedded Image Processing Based on ARM11 and SQLite

2013 ◽  
Vol 373-375 ◽  
pp. 1603-1606
Author(s):  
Chen Chen Liu
Keyword(s):  
Image Processing ◽  
Embedded Systems ◽  
Embedded System ◽  
Research Program ◽  
Processing System ◽  
Image Data ◽  
Store Image ◽  
Efficient Management ◽  
The Embedded System ◽  
Embedded Image

According to the fact that the embedded system is not efficient enough to access and manipulate image data, this paper put forward a research program of image JPEG compression algorithm and being stored in a combination based on the ARM11 and SQLite embedded database image processing system. Comparative Researches on the system without data prove that the program can make the embedded systems more reasonable to store image data and realize the localized efficient management of the image data, which has certain practical value.

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