Compact Single-Phase-Search Multistate Content-Addressable Memory Design Using One FeFET/Cell

IEEE Transactions on Electron Devices ◽

10.1109/ted.2020.3039477 ◽

2020 ◽

pp. 1-9

Author(s):

Ramin Rajaei ◽

Mohammad Mehdi Sharifi ◽

Arman Kazemi ◽

Michael Niemier ◽

Xiaobo Sharon Hu

Keyword(s):

Single Phase ◽

Content Addressable Memory ◽

Memory Design

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Low-power content addressable memory design using two-layer P-N match-line control and sensing

Integration ◽

10.1016/j.vlsi.2020.06.001 ◽

2020 ◽

Vol 75 ◽

pp. 73-84

Author(s):

Sheikh Wasmir Hussain ◽

Telajala Venkata Mahendra ◽

Sandeep Mishra ◽

Anup Dandapat

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Memory Design ◽

Power Content

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A Novel Ternary Content Addressable Memory Design Based on RRAM with High Intensity and Low Search Energy

10.7567/ssdm.2017.a-7-02 ◽

2017 ◽

Author(s):

R. Han ◽

W. Shen ◽

P. Huang ◽

Z. Zhou ◽

L. Liu ◽

...

Keyword(s):

High Intensity ◽

Content Addressable Memory ◽

Memory Design ◽

Ternary Content Addressable Memory

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Low-power content-addressable memory design using a double match-line (DML) architecture

2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS) ◽

10.1109/mwscas.2013.6674676 ◽

2013 ◽

Author(s):

Ya-Chun Lin ◽

Yen-Jen Chang ◽

Tung-Chi Wu

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Memory Design ◽

Power Content

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Static divided word matching line for low-power Content Addressable Memory design

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) ◽

10.1109/iscas.2004.1329350 ◽

2004 ◽

Cited By ~ 2

Author(s):

Kuo-Hsing Cheng ◽

Chia-Hung Wei ◽

Shu-Yu Jiang

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Memory Design ◽

Power Content

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Magnetic Content Addressable Memory Design for Wide Array Structure

IEEE Transactions on Magnetics ◽

10.1109/tmag.2011.2158405 ◽

2011 ◽

Vol 47 (10) ◽

pp. 3864-3867 ◽

Cited By ~ 3

Author(s):

Weizhong Wang

Keyword(s):

Content Addressable Memory ◽

Memory Design ◽

Array Structure

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Three-Transistor DRAM-Based Content Addressable Memory Design for Reliability and Area Efficiency

2009 IEEE International Workshop on Memory Technology, Design, and Testing ◽

10.1109/mtdt.2009.17 ◽

2009 ◽

Author(s):

Wei-Ning Hsu ◽

Tsu-Hsin Wu ◽

Tsung-Chu Huang

Keyword(s):

Design For Reliability ◽

Content Addressable Memory ◽

Memory Design ◽

Area Efficiency

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Efficient Content Addressable Memory Design Using RAM

International Journal of Electronics and Electrical Engineering ◽

10.18178/ijeee.4.5.459-462 ◽

2016 ◽

pp. 459-462 ◽

Cited By ~ 1

Author(s):

Charith P. Wedage ◽

Keyword(s):

Content Addressable Memory ◽

Memory Design

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A Novel High-Density and Low-Power Ternary Content Addressable Memory Design Based on 3D NAND Flash

2020 IEEE Silicon Nanoelectronics Workshop (SNW) ◽

10.1109/snw50361.2020.9131657 ◽

2020 ◽

Author(s):

H. Z. Yang ◽

P. Huang ◽

R. Z. Han ◽

Y. C. Xiang ◽

Y. Feng ◽

...

Keyword(s):

Low Power ◽

High Density ◽

Nand Flash ◽

Content Addressable Memory ◽

Memory Design ◽

Ternary Content Addressable Memory

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Low Power and Low Latency Memristive-Ternary Content Addressable Memory Design Using Absolute Path Search Optimization (APSO) Algorithm

International Journal of Psychosocial Rehabilitation ◽

10.37200/ijpr/v23i3/pr190498 ◽

2019 ◽

Vol 23 (3) ◽

pp. 979-986

Author(s):

Dr. Sharmilee K.

Keyword(s):

Low Power ◽

Low Latency ◽

Content Addressable Memory ◽

Memory Design ◽

Ternary Content Addressable Memory ◽

Search Optimization ◽

Path Search

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A Novel Transition Metal Dichalcogenide based Spin Transfer Torque Ternary Content Addressable Memory Design for Match Line Sense Amplifier

2020 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT) ◽

10.1109/conecct50063.2020.9198397 ◽

2020 ◽

Author(s):

Yatheesh K. C. ◽

Shanti Prasad M. J.

Keyword(s):

Transition Metal ◽

Spin Transfer Torque ◽

Spin Transfer ◽

Transition Metal Dichalcogenide ◽

Content Addressable Memory ◽

Memory Design ◽

Sense Amplifier ◽

Ternary Content Addressable Memory

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