Novel Reconfigurable Field-Effect Transistor With Asymmetric Spacer Engineering at Drain Side

2020 ◽  
Vol 67 (2) ◽  
pp. 751-757 ◽  
Author(s):  
Yan Yao ◽  
Yabin Sun ◽  
Xiaojin Li ◽  
Yanling Shi ◽  
Ziyu Liu
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Drain Side ◽  
Effect Transistor

A NOVEL GRAPHENE NANO-RIBBON FIELD EFFECT TRANSISTOR WITH SCHOTTKY TUNNELING DRAIN AND OHMIC TUNNELING SOURCE

2013 ◽  
Vol 27 (26) ◽  
pp. 1350189 ◽  
Author(s):  
SEYED SALEH GHOREISHI ◽  
KAMYAR SAGHAFI ◽  
MOHAMMAD KAZEM MORAVVEJ-FARSHI
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Schottky Contact ◽  
Graphene Nanoribbon ◽  
Tunneling Fet ◽  
Ambipolar Behavior ◽  
Drain Side ◽  
Mode Space ◽  
Conventional Structure ◽  
Effect Transistor

In this paper, we propose a novel tunneling graphene nanoribbon field effect transistor by modification of the conventional structure in a way that its drain high-doped extension part is replaced by lightly linear doped region. Then the proposed structure has a Schottky contact at the drain side. As the source contact is ohmic and the drain contact is Schottky, this structure is called Schottky–Ohmic tunneling graphene nanoribbon field effect transistor. Electrical behaviors of the proposed device are investigated by mode space nonequilibrium Green's function (NEGF) formalism in the ballistic limit. Simulation results show that without increasing transistor length, I OFF , I ON /I OFF , ambipolar behavior, delay time and PDP of the proposed structure improve, in comparison with the conventional tunneling graphene nanoribbon field effect transistor with the same dimension. Also subthreshold swing which is one of the evident characteristics of the tunneling FET is preserved in this structure.

scholarly journals Leakage Mitigation in NW FET using Negative Schottky Junction Drain and its Process Variation Analysis

2021 ◽  
Author(s):  
Mohd Rizwan Uddin Shaikh ◽  
Sajad A Loan ◽  
Abdullah G Alharbi
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Schottky Barrier Height ◽  
Process Variation ◽  
Process Variations ◽  
Schottky Junction ◽  
Variation Analysis ◽  
Drain Side ◽  
Band To Band Tunneling ◽  
Effect Transistor

Abstract In this work, a Schottky junction on the drain side employing low workfunction (WF) metal is proposed as a method to suppress the OFF-state leakage in nanowire (NW) field-effect transistor (FET). Instead of a highly n+ doped drain, low WF metal with negative electron Schottky-barrier height (SBH) as a drain minimizes the lateral band-to-band tunneling (L-BTBT) considerably. L-BTBT is the movement of carriers (holes) from the drain conduction band (CB) into the channel valence band (VB) during the OFF-state. Impact of varying WF at channel-drain junction on the device characteristics is studied. It is observed that SBH60 eV is required to mitigate L-BTBT compared to the conventionally-doped and junctionless (JL) NW counterpart. Furthermore, unlike L-BTBT, leakage in NW Schottky-drain (SD) comprises of holes tunneling through the SB from the metal drain into the channel and termed as the lateral SB tunneling (L-SBT). In contrast to JL NW FET, the process variation immunity (varying channel doping, NCh and NW diameter, dNW ) and the ON-state current of the proposed device is not compromised at the expense of lower OFF-state LSBT. Instead, the device is less susceptible to process variations and retains the ON-state performance of the NW MOSFET. For a ±20% change in NCh, ∆IOF F /IOF F of 7% compared to 97% in NW JL FET is observed.

scholarly journals Analysis on Tunnel Field-Effect Transistor with Asymmetric Spacer

2020 ◽  
Vol 10 (9) ◽  
pp. 3054
Author(s):  
Hyun Woo Kim ◽  
Daewoong Kwon
Keyword(s):  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Model Parameters ◽  
Tunnel Fet ◽  
Drain Side ◽  
Fringing Field ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor ◽  
The Impact

Tunnel field-effect transistor (Tunnel FET) with asymmetric spacer is proposed to obtain high on-current and reduced inverter delay simultaneously. In order to analyze the proposed Tunnel FET, electrical characteristics are evaluated by technology computer-aided design (TCAD) simulations with calibrated tunneling model parameters. The impact of the spacer κ values on tunneling rate is investigated with the symmetric spacer. As the κ values of the spacer increase, the on-current becomes enhanced since tunneling probabilities are increased by the fringing field through the spacer. However, on the drain-side, that fringing field through the drain-side spacer increases ambipolar current and gate-to-drain capacitance, which degrades leakage property and switching response. Therefore, the drain-side low-κ spacer, which makes the low fringing field, is adapted asymmetrically with the source-side high-κ spacer. This asymmetric spacer results in the reduction of gate-to-drain capacitance and switching delay with the improved on-current induced by the source-side high-κ spacer.

Simulation of Gate-All-Around Tunnel Field-Effect Transistor with an n-Doped Layer

2010 ◽  
Vol E93-C (5) ◽  
pp. 540-545 ◽  
Author(s):  
Dong Seup LEE ◽  
Hong-Seon YANG ◽  
Kwon-Chil KANG ◽  
Joung-Eob LEE ◽  
Jung Han LEE ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor

InGaAs/Si Heterojunction Tunneling Field-Effect Transistor on Silicon Substrate

2014 ◽  
Vol E97.C (7) ◽  
pp. 677-682
Author(s):  
Sung YUN WOO ◽  
Young JUN YOON ◽  
Jae HWA SEO ◽  
Gwan MIN YOO ◽  
Seongjae CHO ◽  
...  
Keyword(s):  
Silicon Substrate ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Effect Transistor

Biosensor Based on Ion-Sensitive Field-Effect Transistor Using Minimum Contact to Float-ing Gate

2019 ◽  
Vol 24 (4) ◽  
pp. 407-414
Author(s):  
Oksana V. Gubanova ◽  
◽  
Evgeniy V. Kuznetsov ◽  
Elena N. Rybachek ◽  
Alexander N. Saurov ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Effect Transistor
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