Circuit Simulation of Threshold-Voltage Degradation in a-Si:H TFTs Fabricated at 175 $^{\circ}\hbox{C}$

2007 ◽  
Vol 54 (7) ◽  
pp. 1781-1783 ◽  
Author(s):  
Rahul Shringarpure ◽  
Sameer Venugopal ◽  
Zi Li ◽  
Lawrence T. Clark ◽  
David R. Allee ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Circuit Simulation ◽  
Voltage Degradation ◽  
Threshold Voltage Degradation

Localization of Gate Bias Induced Threshold Voltage Degradation in a-Si:H TFTs

2008 ◽  
Vol 29 (1) ◽  
pp. 93-95 ◽  
Author(s):  
Rahul Shringarpure ◽  
Sameer Venugopal ◽  
Lawrence T. Clark ◽  
David R. Allee ◽  
Edward Bawolek
Keyword(s):  
Threshold Voltage ◽  
Gate Bias ◽  
Voltage Degradation ◽  
Threshold Voltage Degradation

scholarly journals On the Prediction of the Threshold Voltage Degradation in CMOS Technology Due to Bias-Temperature Instability

Electronics ◽  
2018 ◽  
Vol 7 (12) ◽  
pp. 427 ◽  
Author(s):  
Alejandro Campos-Cruz ◽  
Guillermo Espinosa-Flores-Verdad ◽  
Alfonso Torres-Jacome ◽  
Esteban Tlelo-Cuautle
Keyword(s):  
Threshold Voltage ◽  
Drain Current ◽  
Cmos Technology ◽  
Oxide Semiconductor ◽  
Lookup Table ◽  
Temperature Instability ◽  
Bias Temperature Instability ◽  
Mos Devices ◽  
Voltage Degradation ◽  
Threshold Voltage Degradation

Currently, researchers face new challenges in order to compensate or even reduce the noxious phenomenon known as bias-temperature instability (BTI) that is present in modern metal-oxide-semiconductor (MOS) technologies, which negatively impacts the performance of semiconductor devices. BTI remains a mystery in the way that it evolves in time, as well as the responsible mechanisms for its appearance and the further degradation it produces on MOS devices. The BTI phenomenon is usually associated with an increase of MOS transistor’s threshold voltage; however, this work also addresses BTI as a change in MOSFET’s drain current, transconductance, and the channel’s resistivity. In this way, we detail a physics-based model to get a better insight into the prediction of threshold voltage degradation for aging ranges going from days to years, in 180-nm MOS technology. We highlight that a physics-based BTI model improves accuracy in comparison to lookup table models. Finally, simulation results for the inclusion of such a physics-based BTI model into BSIM3v3 are shown in order to get a better understanding of how BTI impacts the performance of MOS devices.

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