Influence of<tex>$hbox Al_2hbox O_3$</tex>Dielectrics on the Trap-Depth Profiles in MOS Devices Investigated by the Charge-Pumping Method

2004 ◽  
Vol 51 (12) ◽  
pp. 2252-2255 ◽  
Author(s):  
S. Jakschik ◽  
A. Avellan ◽  
U. Schroeder ◽  
J.W. Bartha
Keyword(s):  
Trap Depth ◽  
Charge Pumping ◽  
Depth Profiles ◽  
Mos Devices

Charge pumping in MOS devices

1969 ◽  
Vol 16 (3) ◽  
pp. 297-302 ◽  
Author(s):  
J.S. Brugler ◽  
P.G.A. Jespers
Keyword(s):  
Charge Pumping ◽  
Mos Devices

Evaluation of PBTS and NBTS in SiC MOS Using In Situ Charge Pumping Measurements

2013 ◽  
Vol 740-742 ◽  
pp. 545-548 ◽  
Author(s):  
Daniel B. Habersat ◽  
Aivars J. Lelis ◽  
Ronald Green ◽  
Mooro El
Keyword(s):  
Charge Trapping ◽  
Operating Conditions ◽  
Degradation Mechanisms ◽  
Power Devices ◽  
Charge Pumping ◽  
Long Term Stability ◽  
Accelerated Degradation ◽  
Mos Devices

Since power devices such as DMOSFETs will operate at higher temperatures with accelerated degradation mechanisms, it is essential to understand the effects of typical operating conditions for power electronics applications. We have found that SiC MOSFETs when gate-biased at 150 °C show an increasing charge pumping current over time, suggesting that interface traps (or perhaps near-interface oxide traps) are being created under these conditions. This trapping increase occurs slightly above linear-with-log-time and mimics previously observed threshold voltage instabilities, though a causal relationship has not yet been determined. We found the charge trapping after 104 s of BTS increased at a rate of 1x1011 cm-2/dec for NBTS (-3 MV/cm), 0.7x1011 cm-2/dec for PBTS (3 MV/cm), and 0.3x1011 cm-2/dec when grounded. The observed increase in charge trapping has negative implications for the long term stability and reliability of SiC MOS devices under operating conditions.

Challenges in Interface Trap Characterization of Deep Sub-Micron MOS Devices Using Charge Pumping Techniques

1999 ◽  
Vol 592 ◽  
Author(s):  
J.L. Autran ◽  
P. Masson ◽  
G. Ghibaudo
Keyword(s):  
Time Domain ◽  
Electrical Characterization ◽  
Time Domain Analysis ◽  
Interface Trap ◽  
Interface Traps ◽  
Electrical Behavior ◽  
Charge Pumping ◽  
Mos Devices ◽  
Technological Treatments

ABSTRACTThis work surveys some of our recent experimental and theoretical advances in charge pumping for the electrical characterization of interface traps present in MOSFET architectures. The first part of this paper is devoted to an improved time-domain analysis of the charge pumping phenomenon. This approach presents the main advantage to use the same formalism to describe the charge pumping contribution of a single trap or a continuum of traps at the Si-SiO2 interface. The implications for deepsubmicron MOSFET characterization are illustrated. Some experimental aspects are then presented, including the adaptation of the technique to ultra-thin oxides, non-planar oxides and DRAM memory cells. Finally, recent charge pumping characterization results are reported concerning the electrical behavior of the Si-SiO2 interface submitted to particular technological treatments, electrical and radiation stresses, or post-degradation anneals.

Time-domain charge pumping on silicon-on-insulator MOS devices

2016 ◽  
Vol 56 (1) ◽  
pp. 011303 ◽  
Author(s):  
Tokinobu Watanabe ◽  
Masahiro Hori ◽  
Toshiaki Tsuchiya ◽  
Akira Fujiwara ◽  
Yukinori Ono
Keyword(s):  
Time Domain ◽  
Silicon On Insulator ◽  
Charge Pumping ◽  
Mos Devices

Investigation of voltage-swing effect and trap generation in high-k gate dielectric of MOS devices by charge-pumping measurement

2008 ◽  
Vol 85 (1) ◽  
pp. 20-26 ◽  
Author(s):  
Chun-Yuan Lu ◽  
Kuei-Shu Chang-Liao ◽  
Chun-Chang Lu ◽  
Ping-Hung Tsai ◽  
Yin Yin Kyi ◽  
...  
Keyword(s):  
Gate Dielectric ◽  
Charge Pumping ◽  
Mos Devices ◽  
High K ◽  
Voltage Swing ◽  
High K Gate Dielectric

Characterization of Oxide Films on SiC Epitaxial (000-1) Faces by Angle-Resolved Photoemission Spectroscopy Measurements Using Synchrotron Radiation

2005 ◽  
Vol 483-485 ◽  
pp. 585-588 ◽  
Author(s):  
Yasuto Hijikata ◽  
Hiroyuki Yaguchi ◽  
Sadafumi Yoshida ◽  
Y. Takata ◽  
K. Kobayashi ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Binding Energy ◽  
Oxide Films ◽  
Photoemission Spectroscopy ◽  
Depth Profiles ◽  
Angle Resolved Photoemission Spectroscopy ◽  
Mos Devices ◽  
Thermal Oxide ◽  
Mos Device

Thermal oxide films on SiC epitaxial (000-1) C-faces have been characterized by angle-resolved photoemission spectroscopy (AR-PES). The structure of wet oxide/SiC C-face interface was compared with that of dry oxide/SiC C-face, as well as that of dry oxide/SiC Si-face, in order to clarify why a MOS device of SiC C-face achieved good electrical properties. The improvement in electrical properties was confirmed by AR-PES measurements, evidencing differences in binding energy between SiC and the Si4+ components in Si2p and valence band region, and in binding energy between SiC and the CHx components in C1s. The reason for the improvement in electrical property of MOS devices by use of SiC C-face are discussed in terms of depth profiles of oxide films calculated from the AR-PES results.

Sign in / Sign up

Export Citation Format

Share Document