scholarly journals Nonconcurrent error detection and correction in fault-tolerant discrete-time LTI dynamic systems

Author(s):  
C.N. Hadjicostis
Symmetry ◽  
2020 ◽  
Vol 12 (8) ◽  
pp. 1241
Author(s):  
Alexey Zhirabok

The paper considers the problem of invariance with respect to the unknown input for discrete-time nonlinear dynamic systems. To solve the problem, the algebraic approaches, called algebra of functions and logic–dynamic approach, are used. Such approaches assume that description of the system may contain non-differentiable functions. Necessary and sufficient conditions of solvability the problem are obtained. Moreover, procedures which find the appropriate functions and matrices are developed. Some applications of such invariance in fault detection and isolation, disturbance decoupling problem, and fault-tolerant control are considered.


2021 ◽  
Author(s):  
Naresh Kumar Reddy ◽  
Swamy Cherukuru ◽  
Veena Vani ◽  
Vishal Reddy

Abstract These days, due to the increasing demand for high speed and parallel computation, several real world applications and systems include multiple FPGAs in them. Due to this, FPGAs often need to communicate among them. So, communication between the FPGAs is one of the key factors that determines the accuracy, performance and correctness of the entire multiple FPGAs systems or applications. This paper presents the design of an efficient multi-bit fault tolerant communication system for FPGA-to-FPGA communication. The proposed design is synthesized and also simulated through Vivado design suit 2018.3 and was communicated with two Kintex-7 FPGA boards. When compared with the existing FPGA-to-FPGA communication and inter FPGA communication designs, the proposed design have higher performance, error detection and correction capability.


2007 ◽  
Vol 16 (03) ◽  
pp. 337-356 ◽  
Author(s):  
AMIR MOOSAVIE NIA ◽  
KARIM MOHAMMADI

In this paper, a measure of sensitivity is defined to evaluate fault tolerance of neural networks and we show that the sensitivity of a link is closely related to the amount of information passed through it. Based on this assumption, we prove that the distribution of output error caused by s-a-0 (stuck at 0) faults in an MLP network has a Gaussian distribution function. UDBP (Uniformly Distributed Back Propagation) algorithm is then introduced to minimize mean and variance of the output error. Then an MLP neural network trained with UDBP, contributes in an Algorithm-Based Fault Tolerant (ABFT) scheme to protect a nonlinear data process block. A systematic real convolution code guarantees that faults representing errors in the processed data will result in notable nonzero values in syndrome sequence. A majority logic decoder can now easily detect and correct single faults by observing the syndrome sequence. Simulation results demonstrating the error detection and correction behavior against random s-a-0 faults are presented too.


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