Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture

2010 ◽  
Vol 59 (7) ◽  
pp. 905-921 ◽  
Author(s):  
Yoon Jae Seong ◽  
Eyee Hyun Nam ◽  
Jin Hyuk Yoon ◽  
Hongseok Kim ◽  
Jin-yong Choi ◽  
...  
2011 ◽  
Vol 35 (1) ◽  
pp. 48-59 ◽  
Author(s):  
Jung-Wook Park ◽  
Seung-Ho Park ◽  
Charles C. Weems ◽  
Shin-Dug Kim

2016 ◽  
Vol 23 (7) ◽  
pp. 2521-2535 ◽  
Author(s):  
Ahmed Izzat Alsalibi ◽  
Putra Sumari ◽  
Saleh A. Alomari ◽  
Mohammed Azmi Al-Betar

2013 ◽  
Vol 756-759 ◽  
pp. 3131-3135
Author(s):  
Yuan Hua Yang ◽  
Xian Bin Xu ◽  
Shui Bing He ◽  
Fang Zhen ◽  
Yu Ping Zhang

NAND flash memory has been successfully employed in storage system due to its advantages such as performance, resistance, and capacity. NAND flash memory based solid state disk (SSD) has started to replace disk in numerous environments. However, the poor endurance offered by these SSDs continues to be their key shortcoming. To improve SSD endurance, we propose a static wear-leveling algorithm with variable threshold (WLVT). In contrast with traditional algorithm with fixed threshold, WLVT adjusts the value of threshold, so that each block can simultaneously reach the erasure times that the manufacturer gives when life of SSD is over. Therefore, available erasure time of each block will be fully utilized when SSD fails. Experimental results show that the endurance of the SSD is significantly improved.


2014 ◽  
Vol 513-517 ◽  
pp. 3630-3633
Author(s):  
Kai Bu ◽  
Hai Jun Liu ◽  
Hui Xu ◽  
Zhao Lin Sun

In this paper, we analyzed the endurance of Nand Flash memory and then proposed a level adjusting scheme to use the MLC Flash dynamically to storage different amount of data levels through the entire lifetime. The result shows that the MLC SSD adopting this method could be totally written 4.8X more data than conventional MLC SSD and 16.5% more than SLC SSD.


2013 ◽  
Vol 464 ◽  
pp. 365-368 ◽  
Author(s):  
Ji Jun Hung ◽  
Kai Bu ◽  
Zhao Lin Sun ◽  
Jie Tao Diao ◽  
Jian Bin Liu

This paper presents a new architecture SSD based on NVMe (Non-Volatile Memory express) protocol. The NVMe SSD promises to solve the conventional SATA and SAS interface bottleneck. Its aimed to present a PCIe NAND Flash memory card that uses NAND Flash memory chip as the storage media. The paper analyzes the PCIe protocol and the characteristics of SSD controller, and then gives the detailed design of the PCIe SSD. It mainly contains the PCIe port and Flash Translation Layer.


Sign in / Sign up

Export Citation Format

Share Document