Electrical coupling of single cardiac rat myocytes to field-effect and bipolar transistors

2002 ◽  
Vol 49 (12) ◽  
pp. 1600-1609 ◽  
Author(s):  
T. Kind ◽  
M. Issing ◽  
R. Arnold ◽  
B. Muller
Keyword(s):  
Field Effect ◽  
Electrical Coupling ◽  
Bipolar Transistors ◽  
Rat Myocytes

scholarly journals Investigation of Monolithic 3D Integrated Circuit Inverter with Feedback Field Effect Transistors Using TCAD Simulation

Micromachines ◽  
2020 ◽  
Vol 11 (9) ◽  
pp. 852
Author(s):  
Jong Hyeok Oh ◽  
Yun Seop Yu
Keyword(s):  
Integrated Circuit ◽  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Electrical Coupling ◽  
Propagation Delay ◽  
Channel Length ◽  
Memory Window ◽  
Switching Voltage ◽  
Logic Device

The optimal structure and process for the feedback field-effect transistor (FBFET) to operate as a logic device are investigated by using a technology computer-aided design mixed-mode simulator. To minimize the memory window of the FBFET, the channel length (Lch), thickness of silicon body (Tsi), and doping concentration (Nch) of the channel region below the gate are adjusted. As a result, the memory window increases as Lch and Tsi increase, and the memory window is minimum when Nch is approximately 9 × 1019 cm−3. The electrical coupling between the top and bottom tiers of a monolithic 3-dimensional inverter (M3DINV) consisting of an n-type FBFET located at the top tier and a p-type FBFET located at the bottom tier is also investigated. In the M3DINV, we investigate variation of switching voltage with respect to voltage transfer characteristics (VTC), with different thickness values of interlayer dielectrics (TILD), Tsi, Lch, and Nch. The variation of propagation delay of the M3DINV with different TILD, Tsi, Lch, and Nch is also investigated. As a result, the electrical coupling between the stacked FBFETs by TILD can be neglected. The switching voltage gaps increase as Lch and Tsi increase and decrease, respectively. Furthermore, the slopes of VTC of M3DINV increase as Tsi and Nch increase. For transient response, tpHL decrease as Lch, Tsi, and Nch increase, but tpLH increase as Lch and Tsi increase and it is almost the same for Nch.

Electrical characteristics of lateral heterostructure organic field-effect bipolar transistors

2009 ◽  
Vol 94 (1) ◽  
pp. 013308 ◽  
Author(s):  
Samarendra P. Singh ◽  
Prashant Sonar ◽  
Alan Sellinger ◽  
Ananth Dodabalapur
Keyword(s):  
Field Effect ◽  
Bipolar Transistors ◽  
Electrical Characteristics ◽  
Lateral Heterostructure

scholarly journals Graded-Gap TechnologyFormattingof High-Speed GaAs – TransistorStructuresastheBasisforModern of Large Integrated Circuits

2015 ◽  
Vol 16 (1) ◽  
pp. 221-229
Author(s):  
S.P. Novosyadlyy ◽  
A.M. Bosats'kyy
Keyword(s):  
Integrated Circuits ◽  
Field Effect ◽  
High Speed ◽  
Field Effect Transistors ◽  
Effective Rate ◽  
Bipolar Transistors ◽  
Hot Electron ◽  
Silicon Devices ◽  
Heterostructure Field Effect Transistors ◽  
Gap Technology

Reducing the size of silicon devices is accompanied by an increase in the effective rate of electrons,  decrease transit time and the transition to a ballistic work.Power consumption is reduced too. Formation of large integrated circuits structures onSi-homotransition reduces their frequency range and performance.Nowadaysproposed several new types of devices and technologies forming of large integrated circuits structures that based on high speeds and mobility of electrons in GaAs, and  small size structures.These include, for example, the heterostructure field-effect transistors on a segmented doping, bipolar transistors with wide-emitter, transistor with soulful base, vertical ballistic transistors, devices with flat-doped barriers and hot electron transistors as element base of modern high-speed large integrated circuits.In this article we consider graded-gap technology formatting as bipolar and field-effect transistors, which are the basis of modern high-speedof large integrated circuits structures.

scholarly journals Computer-aided design software for multi-stage amplifiers with bipolar transistors and field effect

2019 ◽  
Vol 1418 ◽  
pp. 012001 ◽  
Author(s):  
L Ramírez-Carvajal ◽  
G Sierra-Peñaranda ◽  
K Puerto-López ◽  
D Guevara-Ibarra
Keyword(s):  
Computer Aided Design ◽  
Field Effect ◽  
Bipolar Transistors ◽  
Multi Stage ◽  
Computer Aided ◽  
Design Software ◽  
Aided Design

Microstructural Characterization of SiGe Heterolayers

1991 ◽  
Vol 239 ◽  
Author(s):  
N. David Theodore ◽  
Peter Fejes ◽  
Mamoru Tomozane ◽  
Ming Liaw
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Infrared Detectors ◽  
Field Effect ◽  
Strain Energy ◽  
Field Effect Transistors ◽  
Microstructural Characterization ◽  
Bipolar Transistors ◽  
Misfit Dislocations ◽  
Extended Defects

ABSTRACTSiGe is of interest for use in heterojunction-bipolar transistors, infrared detectors and field-effect transistors. In this study, graded SiGe heterolayers grown on Si, and heterolayers grown on SIMOX by CVD, were characterized using TEM. The graded-heterolayers consisted of ten layers of Si1-xGex on substrate silicon. Misfit dislocations were present at interfaces in the bottom 4–5 layers of the heterostructure. This conforms with predictions from qualitative strain-energy considerations. The greatest density of misfit dislocations was present at the Si1-xGex interface between the bottom two layers of the heterostructure. Dislocations were observed to extend out of the interface and up into the heterolayer structure. The defects were found to interact with interfaces in the structure and finally cease extending upwards towards the surface of the wafer. In addition to graded heterolayers, SiGe heterolayers grown on SIMOX were also investigated. The structures consisted of epi-silicon grown on a Si/Si1-xGex superlattice which was in turn grown on a Si/SiO2 (SIMOX) structure. The behavior of defects in the layers was of interest. TEM characterization showed a large density of extended-defects present in the layers. Dislocations were observed to originate at the SIMOX oxide/Si interface, propagate up through the SiGe superlattice and into the epi-Si layer. Some dislocations were found to interact with the SiGe superlattice and cease propagating up towards the top of the wafer. SiGe superlattices with a higher concentration of Ge are more effective in reducing defect propagation towards the surface of the wafer.

High Temperature Performance of Normally-off SiC JFET's Compared to Competing Approaches

2010 ◽  
Vol 2010 (HITEC) ◽  
pp. 000152-000159
Author(s):  
J.B. Casady ◽  
D.C. Sheridan ◽  
A. Ritenour ◽  
V. Bondarenko ◽  
R. Kelley
Keyword(s):  
Field Effect ◽  
Room Temperature ◽  
Field Effect Transistors ◽  
Bipolar Transistors ◽  
Insulated Gate Bipolar Transistors ◽  
Power Transistor ◽  
Oxide Semiconductors ◽  
Switching Energy ◽  
Higher Power ◽  
Competing Power

Normally-off Silicon Carbide (SiC) power Junction Field Effect Transistors (JFETs) were compared with competing power transistor technology at temperatures from 25 °C to 150 °C as limited by the packaging. Switching energies were measured from 1200 V, 125 mΩ and 50 mΩ (room temperature) rated SiC power JFETs and compared with 900 V silicon (Si) super-junction Metal Oxide Semiconductors (MOSFETs) and 1200 V Si Insulated Gate Bipolar Transistors (IGBTs). For both comparisons, measured performance for the SiC power JFET was advantageous at all temperatures when switching at 50 kHz, including a total switching energy (ESW) of 97 μJ for the SiC JFET, compared with 158 μJ for the Si super-junction MOSFET, and 550 μJ for the Si IGBT at 25 °C. At 150°C, the ESW was 138 μJ for the SiC power JFET, 413 μJ for the Si super-junction MOSFET, and 1020 μJ for the Si IGBT. Increasing the die size of the 1200 V, normally-off SiC JFET by 2.25 resulted in an measured increase in switching energy of 2.7 and 2.37 at 25 °C and 150 °C, respectively, a quasi-linear relationship. Higher power preview products of the SiC normally-off JFET technology were also examined including a 1200 V, 25 mΩ (room-temperature rating) power JFET characterized up to 250 °C, and a module capable of 1200 V, 120 A DC performance at 25 °C.

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