Survey of Memory Optimization Techniques for Embedded Systems

2013 ◽  
Author(s):  
Lizandro Oliveira ◽  
Julio C. B. Mattos ◽  
Lisane Brisolara
Keyword(s):  
Embedded Systems ◽  
Optimization Techniques ◽  
Memory Optimization

Data and memory optimization techniques for embedded systems

2001 ◽  
Vol 6 (2) ◽  
pp. 149-206 ◽  
Author(s):  
P. R. Panda ◽  
F. Catthoor ◽  
N. D. Dutt ◽  
K. Danckaert ◽  
E. Brockmeyer ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Optimization Techniques ◽  
Memory Optimization

scholarly journals Memory Optimization Techniques in Neural Networks: A Review

2021 ◽  
Vol 10 (6) ◽  
pp. 44-48
Author(s):  
Pratheeksha P ◽  
◽  
Pranav B M ◽  
Dr. Azra Nasreen ◽  
◽  
...  
Keyword(s):  
Neural Networks ◽  
Optimization Methods ◽  
Optimization Techniques ◽  
Model Complexity ◽  
Batch Size ◽  
Network Architectures ◽  
Memory Optimization ◽  
Memory Consumption ◽  
Reduction Techniques ◽  
Complex Models

Deep neural networks have been continuously evolving towards larger and more complex models to solve challenging problems in the field of AI. The primary bottleneck that restricts new network architectures is memory consumption. Running or training DNNs heavily relies on the hardware (CPUs, GPUs, or FPGA) which are either inadequate in terms of memory or hard-to-extend. This would further make it difficult to scale. In this paper, we review some of the latest memory footprint reduction techniques which would enable faster low model complexity. Additionally, it improves accuracy by increasing the batch size and developing wider and deeper neural networks with the same set of hardware resources. The paper emphasizes on memory optimization methods specific to CNN and RNN training.

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