Impact of MOSFET gate-oxide reliability on CMOS operational amplifiers in a 130-nm low-voltage CMOS process

2005 ◽  
Author(s):  
Jung-Sheng Chen ◽  
Ming-Dou Ker
Keyword(s):  
Low Voltage ◽  
Gate Oxide ◽  
Operational Amplifiers ◽  
Cmos Process ◽  
Oxide Reliability ◽  
Cmos Operational Amplifiers

Design Methodologies for Low-Power CMOS Operational Amplifiers in a 0.25¿m Digital CMOS Process

2006 ◽  
Author(s):  
Alfonso Cesar B. Albason ◽  
Neil Michael L. Axalan ◽  
Maria Theresa A. Gusad ◽  
John Richard E. Hizon ◽  
Marc D. Rosales
Keyword(s):  
Low Power ◽  
Operational Amplifiers ◽  
Cmos Process ◽  
Digital Cmos ◽  
Design Methodologies ◽  
Low Power Cmos ◽  
Cmos Operational Amplifiers

Low voltage SILC and P- and N-MOSFET gate oxide reliability

2005 ◽  
Vol 45 (3-4) ◽  
pp. 479-485 ◽  
Author(s):  
C. Petit ◽  
A. Meinertzhagen ◽  
D. Zander ◽  
O. Simonetti ◽  
M. Fadlallah ◽  
...  
Keyword(s):  
Low Voltage ◽  
Gate Oxide ◽  
Oxide Reliability

scholarly journals Low-Voltage Complex Filters Using Current Feedback Operational Amplifiers

2013 ◽  
Vol 2013 ◽  
pp. 1-7 ◽  
Author(s):  
Panagiotis Samiotis ◽  
Costas Psychalinos
Keyword(s):  
Low Voltage ◽  
Operational Amplifiers ◽  
Cmos Process ◽  
Current Feedback ◽  
Mos Transistor ◽  
Low Voltage Operation ◽  
Current Feedback Operational Amplifiers ◽  
Novel Complex ◽  
Simulation Results ◽  
Frequency Behavior

A novel complex filter topology realized using current feedback operational amplifiers as active elements is introduced in this paper. Offered benefits are the low-voltage operation capability and the requirement for employing only grounded passive elements. Two application examples are provided, where the frequency behavior of the derived filters fulfills the ZigBee and Bluetooth standards, respectively. Their performance evaluation has been done through simulation results at postlayout level, using MOS transistor models provided by AMS C35B4 CMOS process.

Design of Clock and Ramp Generator Circuit Framework with 0.9V Low Operational Voltage

2013 ◽  
Vol 284-287 ◽  
pp. 2502-2508
Author(s):  
Rong Jong Wai ◽  
Jun Jie Liaw
Keyword(s):  
Threshold Voltage ◽  
Pulse Width Modulation ◽  
Low Voltage ◽  
Clean Energy ◽  
Oxide Semiconductor ◽  
Operational Amplifiers ◽  
Cmos Process ◽  
Clock Frequency ◽  
Ramp Generator ◽  
Generator Circuit

In this study, a new clock and ramp generator circuit framework with a 0.9V low operational voltage is designed for the voltage-mode/current-mode-controlled power management integrated chip of a DC-DC converter. In conventional clock and ramp generator circuit with operational amplifiers, its operational voltage is limited to be over 1.5V because of the problem of a higher threshold voltage in the metal-oxide-semiconductor field-effect transistor (MOSFET). As a result, it can not work well for a pulse-width-modulation DC-DC converter when a below 1V low-voltage single-cell clean-energy power source is applied. This newly-design clock and ramp generator circuit framework without operational amplifiers is investigated to cope with the limitation of the threshold voltage in the MOSFET. Therefore, the corresponding chip size and power consumption can be reduced. Moreover, this circuit still has the functions of adjustable clock frequency and ramp slope. In addition, numerical simulations by the HSPICE software and experimental results by a real chip fabricated in the TSMC 1P6M 0.18µm CMOS process are given to verify the effectiveness of the proposed circuit to produce the clock and ramp waveforms.

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