Package Size Reduction & Solder Joint Reliability for High Density Semiconductor Packaging

2007 ◽  
Author(s):  
Joseph C. Barrett ◽  
Michael J. Reynolds
Keyword(s):  
Solder Joint ◽  
High Density ◽  
Size Reduction ◽  
Solder Joint Reliability ◽  
Joint Reliability ◽  
Package Size ◽  
Semiconductor Packaging

FCBGA Footprints and Solder Joint Reliability

2004 ◽  
Author(s):  
Frank Z. Liang ◽  
Rick L. Williams
Keyword(s):  
Solder Joint ◽  
Flip Chip ◽  
Electrical Performance ◽  
Solder Joint Reliability ◽  
Routing Optimization ◽  
Joint Reliability ◽  
Cost Constraints ◽  
Package Size ◽  
Empirical Tests ◽  
The One

As electronic package input/output density increases and cost constraints drive the package size smaller, the one area where a designer can not compromise is solder joint reliability. Maintaining flip chip ball grid array (FCBGA) solder joint reliability (SJR) has been at the top of the designer’s critical list with decreasing package size. The FCBGA footprint will need to be modified for a variety of reasons to meet routing optimization, power delivery, electrical performance to name a few. The designer must deal with several competing proposals (electrical performance, cost and use conditions) trying to optimize the FCBGA footprint while being aware that some modifications can negatively affect SJR. This paper investigates solder ball layouts and their effect on SJR through both finite element (FE) models and empirical tests. In addition, consideration of next generation layout is presented to optimize routability while preserving SJR. When feasible, empirical tests were run to validate predictive models.

Solder Joint Reliability Challenges in Sub 1.00 mm Ball Pitch for Flip Chip Ball Grid Array

2005 ◽  
Author(s):  
Keh Shin Beh ◽  
Wei Keat Loh ◽  
Jenn Seong Leong ◽  
Wooi Aun Tan
Keyword(s):  
Solder Joint ◽  
Flip Chip ◽  
Compressive Load ◽  
Heat Sinks ◽  
Thickness Effect ◽  
Solder Joint Reliability ◽  
Load Effect ◽  
Joint Reliability ◽  
Package Size ◽  
The Impact

FCBGA is an electronic package used to achieve a high Inputs/Outputs (I/Os). To continue to achieve a higher I/O count without increasing package size, ball pitch reduction is inevitable. However, ball pitch reduction using smaller ball size has posed substantial challenges to solder joint reliability (SJR). On top of that, rising power dissipation requirement in FCBGA package has created a need for high performance heat sinks. These heat sinks require significant compression loading to ensure good thermal conductance of thermal interface materials. The impact of these loads on SJR has typically not been considered in thermal cycle stressing. Hence, this paper focuses on different types of heat sinks and their compressive load effect on solder joint thermal fatigue performance. It also covers package size and board thickness effect when heat sink compressive load is taken into account during thermal stressing. Lastly, lead free and eutectic solders at sub 1.00mm ball pitch technology were also evaluated.

Design for lead‐free solder joint reliability of high‐density packages

2004 ◽  
Vol 16 (1) ◽  
pp. 12-26 ◽  
Author(s):  
John Lau ◽  
Walter Dauksher ◽  
Joe Smetana ◽  
Rob Horsley ◽  
Dongkai Shangguan ◽  
...  
Keyword(s):  
Solder Joint ◽  
High Density ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Joint Reliability ◽  
Joint Reliability ◽  
Free Solder

Experimental evaluation of SnAgCu solder joint reliability in 100-μm pitch flip-chip assemblies

2014 ◽  
Vol 54 (5) ◽  
pp. 939-944 ◽  
Author(s):  
Ye Tian ◽  
Xi Liu ◽  
Justin Chow ◽  
Yi Ping Wu ◽  
Suresh K. Sitaraman
Keyword(s):  
Solder Joint ◽  
Experimental Evaluation ◽  
Flip Chip ◽  
Solder Joint Reliability ◽  
Snagcu Solder ◽  
Joint Reliability
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