Efficient utilization of scratch-pad memory for embedded systems

2009 ◽  
Author(s):  
Wei Hu ◽  
Tianzhou Chen ◽  
Qingsong Shi ◽  
Feng Sha
Keyword(s):  
Embedded Systems ◽  
Efficient Utilization ◽  
Scratch Pad Memory

scholarly journals An Allocation Optimization Method for Partially-reliable Scratch-pad Memory in Embedded Systems

2015 ◽  
Vol 8 (0) ◽  
pp. 100-104
Author(s):  
Takuya Hatayama ◽  
Hideki Takase ◽  
Kazuyoshi Takagi ◽  
Naofumi Takagi
Keyword(s):  
Embedded Systems ◽  
Optimization Method ◽  
Scratch Pad Memory

A Region-Based Allocation Approach for Page-Based Scratch-Pad Memory in Embedded Systems

2009 ◽  
Author(s):  
Sheng-Wei Huang ◽  
Yung-Chang Chiu ◽  
Zhong-Ho Chen ◽  
Ce-Kuen Shieh ◽  
Alvin Wen-Yu Su ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Scratch Pad Memory ◽  
Allocation Approach

Compiler-assisted dynamic scratch-pad memory management with space overlapping for embedded systems

2010 ◽  
Vol 41 (7) ◽  
pp. 737-752 ◽  
Author(s):  
Yanqin Yang ◽  
Haijin Yan ◽  
Zili Shao ◽  
Minyi Guo
Keyword(s):  
Embedded Systems ◽  
Memory Management ◽  
Scratch Pad Memory

Efficient Utilization of FPGA Using LUT-6 Architecture

2012 ◽  
Vol 241-244 ◽  
pp. 2548-2554
Author(s):  
Razia Zia ◽  
Muzaffar Rao ◽  
Arshad Aziz ◽  
Pervez Akhtar
Keyword(s):  
Embedded Systems ◽  
Market Share ◽  
Boolean Functions ◽  
Field Programmable Gate Array ◽  
Efficient Utilization ◽  
Look Up Table ◽  
Fpga Architecture ◽  
Logic Block ◽  
Field Programmable ◽  
Typical Cell

Field Programmable gate array (FPGA) technology is continuously gaining market share and becoming essential part of the today’s modern embedded systems. The most common FPGA architecture consists of an array of logic blocks called Configurable Logic Block (CLB), I/O pads, and routing channels. In general, a logic block (CLB) consists of logical cells called Slices and other dedicated resources. A typical cell consists of LUTs (Look up table). In modern FPGAs, there are 6-input LUTs instead of 4-input LUTs. In this paper we present the use of 6-input LUT architecture for some Boolean functions (Mux8, Mux16, Mux32, Mux64, SOP64, OR40 and AND40).we show our results in terms of LUTs and Slices and these results are much better as compare to previously reported results that based on 4-input LUTs.

Energy-aware scratch-pad memory partitioning for embedded systems

2014 ◽  
Author(s):  
Florin Balasa ◽  
Noha Abuaesh ◽  
Cristian V. Gingu ◽  
Ilie I. Luican ◽  
Doru V. Nasui
Keyword(s):  
Embedded Systems ◽  
Energy Aware ◽  
Scratch Pad Memory
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