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A Performance Analytical Approach Based on Queuing Model for Network-on-Chip
2010 3rd International Symposium on Parallel Architectures, Algorithms and Programming
◽
10.1109/paap.2010.46
◽
2010
◽
Cited By ~ 2
Author(s):
Zhang Youhui
◽
Zheng Weimin
◽
Dong Xiaoguo
◽
Gan Siqing
Keyword(s):
Analytical Approach
◽
Network On Chip
◽
Queuing Model
◽
On Chip
◽
A Performance
Download Full-text
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Cited By
References
An accurate and efficient performance analysis approach based on queuing model for Network on Chip
Proceedings of the 2009 International Conference on Computer-Aided Design - ICCAD '09
◽
10.1145/1687399.1687505
◽
2009
◽
Cited By ~ 12
Author(s):
Mingche Lai
◽
Lei Gao
◽
Nong Xiao
◽
Zhiying Wang
Keyword(s):
Performance Analysis
◽
Network On Chip
◽
Analysis Approach
◽
Queuing Model
◽
Efficient Performance
◽
On Chip
Download Full-text
An Analytical Approach for Network-on-Chip Performance Analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
◽
10.1109/tcad.2010.2061613
◽
2010
◽
Vol 29
(12)
◽
pp. 2001-2013
◽
Cited By ~ 72
Author(s):
Umit Y. Ogras
◽
Paul Bogdan
◽
Radu Marculescu
Keyword(s):
Performance Analysis
◽
Analytical Approach
◽
Network On Chip
◽
On Chip
Download Full-text
A Performance Evaluation for Optical Network-on-Chip Interconnect Architectures
Asia Communications and Photonics Conference and Exhibition
◽
10.1364/acp.2009.thd4
◽
2009
◽
Cited By ~ 1
Author(s):
Shiqing Wang
◽
Huaxi Gu
Keyword(s):
Performance Evaluation
◽
Optical Network
◽
Network On Chip
◽
Interconnect Architectures
◽
On Chip
◽
A Performance
Download Full-text
A performance enhanced dual-switch Network-on-Chip architecture
The 20th Asia and South Pacific Design Automation Conference
◽
10.1109/aspdac.2015.7058983
◽
2015
◽
Cited By ~ 1
Author(s):
Lian Zeng
◽
Takahiro Watanabe
Keyword(s):
Network On Chip
◽
On Chip
◽
A Performance
Download Full-text
Design of a performance enhanced and power reduced dual-crossbar Network-on-Chip (NoC) architecture
Microprocessors and Microsystems
◽
10.1016/j.micpro.2010.09.003
◽
2011
◽
Vol 35
(2)
◽
pp. 110-118
◽
Cited By ~ 7
Author(s):
Yixuan Zhang
◽
Randy Morris
◽
Avinash K. Kodi
Keyword(s):
Network On Chip
◽
On Chip
◽
Crossbar Network
◽
A Performance
Download Full-text
A Performance Enhanced Dual-switch Network-on-chip Architecture
IPSJ Transactions on System LSI Design Methodology
◽
10.2197/ipsjtsldm.8.85
◽
2015
◽
Vol 8
(0)
◽
pp. 85-94
◽
Cited By ~ 1
Author(s):
Lian Zeng
◽
Xin Jiang
◽
Takahiro Watanabe
Keyword(s):
Network On Chip
◽
On Chip
◽
A Performance
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A performance analytical model for Network-on-Chip with constant service time routers
Proceedings of the 2009 International Conference on Computer-Aided Design - ICCAD '09
◽
10.1145/1687399.1687506
◽
2009
◽
Cited By ~ 22
Author(s):
Nikita Nikitin
◽
Jordi Cortadella
Keyword(s):
Analytical Model
◽
Service Time
◽
Network On Chip
◽
On Chip
◽
A Performance
Download Full-text
Design and implementation of a network on chip-based simulator: a performance study
International Journal of Computational Science and Engineering
◽
10.1504/ijcse.2014.058702
◽
2014
◽
Vol 9
(1/2)
◽
pp. 95
◽
Cited By ~ 1
Author(s):
V. Sanju
◽
C. Koushika
◽
R. Sharmili
◽
Niranjan Chiplunkar
◽
M. Khalid
Keyword(s):
Network On Chip
◽
Performance Study
◽
Design And Implementation
◽
On Chip
◽
A Performance
Download Full-text
A Performance-Enhancing Fault-Tolerant Routing Algorithm for Network-on-Chip in Uniform Traffic
2009 Third Asia International Conference on Modelling & Simulation
◽
10.1109/ams.2009.86
◽
2009
◽
Author(s):
Arshin Rezazadeh
◽
Mahmood Fathy
◽
Amin Hassanzadeh
Keyword(s):
Fault Tolerant
◽
Routing Algorithm
◽
Network On Chip
◽
On Chip
◽
Performance Enhancing
◽
A Performance
Download Full-text
A Performance Model for Network-on-Chip Wormhole Routers
Journal of Computers
◽
10.4304/jcp.7.1.76-84
◽
2012
◽
Vol 7
(1)
◽
Cited By ~ 4
Author(s):
Youhui Zhang
◽
Xiaoguo Dong
◽
Siqing Gan
◽
Weimin Zheng
Keyword(s):
Network On Chip
◽
Performance Model
◽
On Chip
◽
A Performance
Download Full-text
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