Transient fault-tolerance through algorithms

G.K. Saha

doi:10.1109/mp.2006.1692282

PLR: A Software Approach to Transient Fault Tolerance for Multicore Architectures

IEEE Transactions on Dependable and Secure Computing ◽

10.1109/tdsc.2008.62 ◽

2009 ◽

Vol 6 (2) ◽

pp. 135-148 ◽

Cited By ~ 71

Author(s):

A. Shye ◽

J. Blomstedt ◽

T. Moseley ◽

V.J. Reddi ◽

D.A. Connors

Keyword(s):

Fault Tolerance ◽

Multicore Architectures ◽

Transient Fault

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Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance

37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'07) ◽

10.1109/dsn.2007.98 ◽

2007 ◽

Cited By ~ 59

Author(s):

Alex Shye ◽

Tipp Moseley ◽

Vijay Janapa Reddi ◽

Joseph Blomstedt ◽

Daniel A. Connors

Keyword(s):

Fault Tolerance ◽

Transient Fault ◽

Multiple Cores ◽

Process Level

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Transient Fault Tolerance and System Safety Enhancement Based on System Theory

Journal of Software ◽

10.4304/jsw.6.10.2082-2089 ◽

2011 ◽

Vol 6 (10) ◽

Cited By ~ 1

Author(s):

Xiongfeng Huang ◽

Chunjie Zhou ◽

Yuanqing Qin ◽

Ye Wang ◽

Mingyue Yang

Keyword(s):

System Theory ◽

Fault Tolerance ◽

System Safety ◽

Transient Fault ◽

Safety Enhancement

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Survey on Fault Tolerance Startgies for Advance Microelectronics Chip

International Journal on Recent and Innovation Trends in Computing and Communication ◽

10.17762/ijritcc.v7i1.5217 ◽

2019 ◽

Vol 7 (1) ◽

pp. 01-04

Author(s):

Himanshu Shekhar, Prof. Deepa Gianchandani

Keyword(s):

Fault Tolerance ◽

Power Supply ◽

Fault Tolerant ◽

Full Adder ◽

Equipment Design ◽

Transient Faults ◽

Transient Fault

In the complex advance microelectronics based system, handling units are managing gadgets of littler size, which are delicate to the transient faults. A framework should be fabricated that will perceive the presence of faults and fuses strategies to will endure these faults without troublesome the typical activity A transient fault happens in a circuit caused by the electromagnetic commotions, astronomical beams, crosstalk and power supply clamor. It is extremely hard to recognize these faults amid disconnected testing. Subsequently a region effective fault tolerant full adder for testing and fixing of transient and changeless faults happened in single and multi-net is proposed. Furthermore, the proposed design can likewise identify and fix perpetual faults. This structure acquires much lower equipment overheads with respect to the conventional equipment design. In this paper, talk about various fault tolerant methodology for CMOS and ICs.

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