Silicon compilation: The future is now: Silicon compilers liberate the integrated circuit design process

1986 ◽  
Vol 5 (2) ◽  
pp. 27-29
Author(s):  
Walter Curtis
Keyword(s):  
Design Process ◽  
Circuit Design ◽  
Integrated Circuit ◽  
Integrated Circuit Design ◽  
The Future ◽  
Silicon Compilation

DoD Design Cloud Analysis: Securing the Integrated Circuit Design Process

2012 ◽  
Author(s):  
Mario N. Gomez
Keyword(s):  
At Risk ◽  
Design Process ◽  
Circuit Design ◽  
Department Of Defense ◽  
Integrated Circuit ◽  
Secure Communication ◽  
Integrated Circuit Design ◽  
Defense Systems ◽  
Design Software ◽  
Security Costs

The use of unsecure foundries has allowed and is still providing a pathway for counterfeit microelectronics into U.S. defense systems. As a result, the Warfighter has been put at risk and a solution is needed. To counter this dilemma, this study looks into the feasibility of creating a Department of Defense (DoD) - wide design cloud that would provide circuit designers with a more secure and economical way of designing and fabricating circuits. The design cloud would include secure communication to trusted foundries along with needed circuit design software. Factors such as security, costs, benefits, and issues are taken into consideration in determining whether the use of the cloud would actually aid the integrated circuit design process.

Influence of Lithography Distortion due to Metal Fill on CA

2014 ◽  
Vol 900 ◽  
pp. 651-655
Author(s):  
Xiao Ming Chen ◽  
Ke Qin Wang ◽  
Song Song Li
Keyword(s):  
Circuit Design ◽  
Integrated Circuit ◽  
Chemical Mechanical Polishing ◽  
Mechanical Polishing ◽  
Critical Area ◽  
Integrated Circuit Design ◽  
Technology Node ◽  
Design And Manufacturing ◽  
The Future

In the process of integrated circuit design and manufacturing, dummy metal fill can improve the planarity of layout after Chemical Mechanical Polishing (CMP). However, it will also cause lithography distortion and Critical Area (CA) variation. This paper compares and analyzes the influences of lithography distortion due to metal fill on CA from the perspectives of different defect particles based on 45nm technology node. The results indicate that dummy metal fill can increase open CA after lithography and the defect particle with the diameter of 0.066um leads to the largest increment percentage of open CA, which will take up almost 10%. This paper is instructive in researching dummy metal fill and CA or related fields in the future.

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