Transactional Memory Architecture and Implementation for IBM System Z

2012 45th Annual IEEE/ACM International Symposium on Microarchitecture ◽

10.1109/micro.2012.12 ◽

2012 ◽

Cited By ~ 93

Author(s):

Christian Jacobi ◽

Timothy Slegel ◽

Dan Greiner

Keyword(s):

Transactional Memory ◽

Memory Architecture

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A Predictable Transactional Memory Architecture with Selective Conflict Resolution for Mixed-Criticality Support in MPSoCs

2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing ◽

10.1109/euc.2015.11 ◽

2015 ◽

Cited By ~ 2

Author(s):

Zaher Owda ◽

Roman Obermaisser

Keyword(s):

Conflict Resolution ◽

Transactional Memory ◽

Memory Architecture ◽

Mixed Criticality

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Design tradeoffs in speculative Transactional memory architecture

Proceedings 2011 International Conference on Transportation, Mechanical, and Electrical Engineering (TMEE) ◽

10.1109/tmee.2011.6199454 ◽

2011 ◽

Author(s):

Yaobin Wang ◽

Zhiqin Liu ◽

Mingyan Wu ◽

Fupan Wang ◽

Hong An

Keyword(s):

Transactional Memory ◽

Memory Architecture ◽

Design Tradeoffs

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Scalable Transactional Memory Architecture Supporting Speculative Parallelization

2011 International Conference on Network Computing and Information Security ◽

10.1109/ncis.2011.117 ◽

2011 ◽

Author(s):

Yaobin Wang ◽

Hong An ◽

Rui Guo ◽

Xiaoming Gao ◽

Fei Chen

Keyword(s):

Transactional Memory ◽

Memory Architecture ◽

Speculative Parallelization

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A Hardware/Software Co-designed Speculative Transactional Memory Architecture

Journal of Convergence Information Technology ◽

10.4156/jcit.vol7.issue13.25 ◽

2012 ◽

Vol 7 (13) ◽

pp. 215-222

Author(s):

Yaobin Wang ◽

Hong An ◽

Zhiqin Liu ◽

Fei Chen ◽

Zhu Liang

Keyword(s):

Transactional Memory ◽

Memory Architecture

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Hardware transactional memory architecture with adaptive version management for multi-processor FPGA platforms

Journal of Systems Architecture ◽

10.1016/j.sysarc.2016.12.006 ◽

2017 ◽

Vol 73 ◽

pp. 42-52 ◽

Cited By ~ 3

Author(s):

Jeevan Sirkunan ◽

Chia Yee Ooi ◽

N. Shaikh-Husin ◽

Yuan Wen Hau ◽

M.N. Marsono

Keyword(s):

Transactional Memory ◽

Memory Architecture ◽

Version Management ◽

Hardware Transactional Memory

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Performance characterization of a DRAM-NVM hybrid memory architecture for HPC applications using intel optane DC persistent memory modules

Proceedings of the International Symposium on Memory Systems - MEMSYS '19 ◽

10.1145/3357526.3357541 ◽

2019 ◽

Cited By ~ 4

Author(s):

Onkar Patil ◽

Latchesar Ionkov ◽

Jason Lee ◽

Frank Mueller ◽

Michael Lang

Keyword(s):

Memory Architecture ◽

Performance Characterization ◽

Hybrid Memory ◽

Persistent Memory ◽

Memory Modules

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Technological Design of 3D NAND based Compute-in-Memory Architecture for GB-scale Deep Neural Network

IEEE Electron Device Letters ◽

10.1109/led.2020.3048101 ◽

2020 ◽

pp. 1-1

Author(s):

Wonbo Shim ◽

Shimeng Yu

Keyword(s):

Neural Network ◽

Deep Neural Network ◽

Memory Architecture ◽

Technological Design

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Accelerating GPU Hardware Transactional Memory with Snapshot Isolation

ACM SIGARCH Computer Architecture News ◽

10.1145/3140659.3080204 ◽

2017 ◽

Vol 45 (2) ◽

pp. 282-294 ◽

Cited By ~ 2

Author(s):

Sui Chen ◽

Lu Peng ◽

Samuel Irving

Keyword(s):

Transactional Memory ◽

Hardware Transactional Memory ◽

Snapshot Isolation

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Revisiting software transactional memory in Haskell

ACM SIGPLAN Notices ◽

10.1145/3241625.2976020 ◽

2018 ◽

Vol 51 (12) ◽

pp. 105-113

Author(s):

Matthew Le ◽

Ryan Yates ◽

Matthew Fluet

Keyword(s):

Transactional Memory ◽

Software Transactional Memory

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Starvation-free commit arbitration policies for transactional memory systems

ACM SIGARCH Computer Architecture News ◽

10.1145/1241601.1241610 ◽

2007 ◽

Vol 35 (1) ◽

pp. 39-46 ◽

Cited By ~ 2

Author(s):

M. M. Waliullah ◽

Per Stenstrom

Keyword(s):

Transactional Memory ◽

Memory Systems

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