An Object Oriented Codesign Flow for low-cost HW/SW/mixed-signal systems based on UML

Testing methods based on residue codes are considered as simple, with high probability of detecting errors. Most of the literatures on arithmetic error control codes are mainly focused on applications of secure data transmission and testing digital circuits rather than testing mixed-signal systems. In both cases implementation of residue computing circuit (RCC), also known as the residue generator is an integral part of the hardware design. In this work a low-cost compactor circuit to calculate the residue for on-line testing of analog-to-digital converter has been presented. Aliasing rate and its relationship with the resolution of the ADC have been analyzed. Theory and operation of Linear Feedback Shift Registers have been applied for the implementation of the modulo adder circuit. The compaction circuits were simulated, and the result confirmed the theoretical analysis.

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Application Of Residue Codes For Error Detection In Mixed Signal Devices

10.32920/ryerson.14660952.v1 ◽

2021 ◽

Author(s):

Leila Feyzmohammadi

Keyword(s):

Error Detection ◽

Error Control ◽

Low Cost ◽

Linear Feedback ◽

Error Control Codes ◽

Mixed Signal ◽

Analog To Digital ◽

Signal Systems ◽

Secure Data Transmission ◽

On Line

Testing methods based on residue codes are considered as simple, with high probability of detecting errors. Most of the literatures on arithmetic error control codes are mainly focused on applications of secure data transmission and testing digital circuits rather than testing mixed-signal systems. In both cases implementation of residue computing circuit (RCC), also known as the residue generator is an integral part of the hardware design. In this work a low-cost compactor circuit to calculate the residue for on-line testing of analog-to-digital converter has been presented. Aliasing rate and its relationship with the resolution of the ADC have been analyzed. Theory and operation of Linear Feedback Shift Registers have been applied for the implementation of the modulo adder circuit. The compaction circuits were simulated, and the result confirmed the theoretical analysis.

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Rapid prototyping of algorithmic A/D converters based on FPAA devices

Bulletin of the Polish Academy of Sciences Technical Sciences ◽

10.2478/bpasts-2013-0073 ◽

2013 ◽

Vol 61 (3) ◽

pp. 691-696 ◽

Cited By ~ 4

Author(s):

R. Suszynski ◽

K. Wawryn

Keyword(s):

Rapid Prototyping ◽

Sinusoidal Signal ◽

Digital Converter ◽

Mixed Signal ◽

Analog Digital Converter ◽

Signal Systems ◽

Programmable Analog ◽

Field Programmable ◽

Field Programmable Analog Array

Abstract A rapid prototyping method for designing mixed signal systems has been presented in the paper. The method is based on implementation of the field programmable analog array (FPAA) to configure and reconfigure mixed signal systems. A serial algorithmic analog digital converter has been used as an example. Three converter architectures have been selected and implemented FPAA device. To verify and illustrate converters operation and prototyping capabilities, implemented converters have been excited by a sinusoidal signal. Analog sinusoidal excitations, digital responses and sinusoidal waveforms after reconstruction are presented.

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