LCTI–SS: Low-Clock-Tree-Impact Scan Segmentation for Avoiding Shift Timing Failures in Scan Testing

2013 ◽  
Vol 30 (4) ◽  
pp. 60-70 ◽  
Author(s):  
Yuta Yamato ◽  
Kohei Miyase ◽  
Seiji Kajihara ◽  
Xiaoqing Wen ◽  
Laung-Terng Wang ◽  
...  
Keyword(s):  
Clock Tree ◽  
Scan Testing

Diagnose Compound Hold Time Faults Caused by Spot Delay Defects at Clock Tree

2011 ◽  
Author(s):  
Yu Huang ◽  
Wu-Tung Cheng ◽  
Ting-Pu Tai ◽  
Liyang Lai ◽  
Ruifeng Guo ◽  
...  
Keyword(s):  
Hold Time ◽  
Clock Signal ◽  
Clock Tree ◽  
Scan Testing ◽  
Design Error ◽  
Functional Logic ◽  
Scan Chains ◽  
Delay Defects

Abstract If a signal on clock tree is slower than expected due to either a design error or a manufacturing defect, it may cause complicated fault behaviors during scan-based testing. It makes the diagnosis of such defect especially difficult if the defective clock signal is used for both shift and capture operations during the scan testing, because (1) the defect induces hold time faults on scan chains during shift cycles, and (2) hold-time faults may also be introduced during capture cycles in the functional logic paths. In this paper we illustrate the failure behaviors of such clock defects and propose an algorithm to diagnose it.

Layout-Driven Skewed Clock Tree Synthesis for Superconducting SFQ Circuits

2011 ◽  
Vol E94-C (3) ◽  
pp. 288-295 ◽  
Author(s):  
Kazuyoshi TAKAGI ◽  
Yuki ITO ◽  
Shota TAKESHIMA ◽  
Masamitsu TANAKA ◽  
Naofumi TAKAGI
Keyword(s):  
Clock Tree ◽  
Clock Tree Synthesis ◽  
Tree Synthesis

Application of Scan Based FA and Advanced Passive Voltage Contrast Technique in Defect Isolation

2003 ◽  
Author(s):  
Michael B. Schmidt ◽  
Noor Jehan Saujauddin
Keyword(s):  
Failure Analysis ◽  
Large Scale ◽  
Fault Isolation ◽  
Electronic Information ◽  
Scan Testing ◽  
Challenging Environment ◽  
Contrast Technique ◽  
Defect Isolation ◽  
Voltage Contrast ◽  
Higher Sensitivity

Abstract Scan testing and passive voltage contrast (PVC) techniques have been widely used as failure analysis fault isolation tools. Scan diagnosis can narrow a failure to a given net and passive voltage contrast can give real-time, large-scale electronic information about a sample at various stages of deprocessing. In the highly competitive and challenging environment of today, failure analysis cycle time is very important. By combining scan FA with a much higher sensitivity passive voltage contrast technique, one can quickly find defects that have traditionally posed a great challenge.

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