Designing Efficient Parallel Processing in 3D Standard-Chip Stacking System with Standard Bus

Author(s):  
Takeshi Ohkawa ◽  
Kanemitsu Ootsu ◽  
Takashi Yokota ◽  
Katsuya Kikuchi ◽  
Masahiro Aoyagi
2017 ◽  
Vol 131 (4) ◽  
pp. 337-347 ◽  
Author(s):  
Gesa Feenders ◽  
Yoko Kato ◽  
Katharina M. Borzeszkowski ◽  
Georg M. Klump

1994 ◽  
Author(s):  
Robert S. Mccann ◽  
David C. Foyle ◽  
James C. Johnston
Keyword(s):  

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